Searched full:spi_clk (Results 1 – 7 of 7) sorted by relevance
49 39 SPI_SEL1/SPI_SS_N SPI_CLK 82
82 pinmux = < SMARTBOND_PINMUX(SPI_CLK, 0, 21) >,
74 #define SDP_120_SPI_CLK SDP_120_IO(82) /* SPI_CLK */
92 pinmux = <SMARTBOND_PINMUX(SPI_CLK, 0, 21)>,
52 <81 0 &gpioh 6 0>, /* SPI_CLK - spi5_sck_ph6 */
56 * This is a calibrated delay loop used to achieve a 1 MHz SPI_CLK frequency
308 | J17 | closed solder jumper | testpoint EPD SPI_CLK |
