Searched full:siul2 (Results 1 – 8 of 8) sorted by relevance
/Zephyr-Core-3.5.0/dts/bindings/interrupt-controller/ |
D | nxp,s32-siul2-eirq.yaml | 5 description: NXP S32 SIUL2 External Interrupts Request controller 7 compatible: "nxp,s32-siul2-eirq" 42 NXP S32 SIUL2 External Interrupt line configuration. For each
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/Zephyr-Core-3.5.0/dts/bindings/gpio/ |
D | nxp,s32-gpio.yaml | 8 to either the SIUL2 EIRQ interrupt controller or, when available on the SoC, 10 SIUL2 EIRQ interrupt controller.
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/Zephyr-Core-3.5.0/include/zephyr/dt-bindings/pinctrl/ |
D | nxp-s32-pinctrl.h | 19 * - 25..27: SIUL2 instance index (0..7) 66 * @param siul2_idx SIUL2 instance index
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/Zephyr-Core-3.5.0/dts/arm/nxp/ |
D | nxp_s32z27x_r52.dtsi | 212 siul2_0: siul2@40520000 { 218 compatible = "nxp,s32-siul2-eirq"; 264 siul2_1: siul2@40d20000 { 270 compatible = "nxp,s32-siul2-eirq"; 336 siul2_3: siul2@41d20000 { 340 siul2_4: siul2@42520000 { 346 compatible = "nxp,s32-siul2-eirq"; 415 siul2_5: siul2@42d20000 { 421 compatible = "nxp,s32-siul2-eirq";
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D | nxp_s32k344_m7.dtsi | 86 siul2: siul2@40290000 { label 92 compatible = "nxp,s32-siul2-eirq";
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/Zephyr-Core-3.5.0/boards/arm/mr_canhubk3/doc/ |
D | index.rst | 48 SIUL2 on-chip | pinctrl 75 to either the SIUL2 EIRQ or WKPU interrupt controllers, as supported by the SoC. 76 By default, GPIO interrupts are routed to SIUL2 EIRQ interrupt controller,
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/Zephyr-Core-3.5.0/boards/arm/s32z270dc2_r52/doc/ |
D | index.rst | 44 | SIUL2 | on-chip | pinctrl |
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/Zephyr-Core-3.5.0/doc/releases/ |
D | release-notes-3.3.rst | 757 * Added NXP S32 GPIO (SIUL2) driver 797 * Added NXP S32 External Interrupt Controller (SIUL2) driver. 832 * Added NXP S32 SIUL2 driver 1376 - :dtcompatible:`nxp,s32-siul2-eirq`
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