| /Zephyr-Core-2.7.6/doc/reference/power_management/ |
| D | index.rst | 3 Power Management
6 Zephyr RTOS power management subsystem provides several means for a system
7 integrator to implement power management support that can take full
8 advantage of the power saving features of SOCs.
22 :dfn:`Power gating`
23 Power gating reduces power consumption by shutting off current to blocks of
26 :dfn:`Power State`
27 SOC Power State describes processor and device power states implemented at
28 the SOC level. Power states are represented by :c:enum:`pm_state` and each
31 :dfn:`Device Runtime Power Management`
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| /Zephyr-Core-2.7.6/subsys/pm/ |
| D | Kconfig | 5 menu "Power Management"
8 bool "System Power management"
14 bool "System Power Management"
17 This option enables the board to implement extra power management
19 power management subsystem of the number of ticks until the next kernel
25 bool "System Power Management debug hooks"
27 Enable System Power Management debugging hooks.
32 module-str = System Power Management
42 targets where system power management is not supported, for example
43 on support core of a multi-core device where SoC power management is
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| D | pm_ctrl.c | 13 #define LOG_LEVEL CONFIG_PM_LOG_LEVEL /* From power module Kconfig */
15 LOG_MODULE_DECLARE(power);
25 __ASSERT(state < PM_STATES_LEN, "Invalid power state!"); in pm_constraint_set()
27 __ASSERT(v < UINT_MAX, "Power state disable count overflowed!"); in pm_constraint_set()
37 __ASSERT(state < PM_STATES_LEN, "Invalid power state!"); in pm_constraint_release()
39 __ASSERT(v > 0, "Power state disable count underflowed!"); in pm_constraint_release()
47 __ASSERT(state < PM_STATES_LEN, "Invalid power state!"); in pm_constraint_get()
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| /Zephyr-Core-2.7.6/include/pm/ |
| D | pm.h | 21 * @defgroup power_management_api Power Management
27 * @brief System Power Management API
29 * @defgroup system_power_management_api System Power Management API
35 * Power management notifier struct
38 * exits power states.
56 * for power state entry.
61 * for power state exit.
68 * @brief Force usage of given power state.
71 * usage of given power state immediately.
75 * @param info Power state which should be used in the ongoing
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| D | state.h | 18 * @defgroup pm_states Power Management States
24 * @enum pm_state Power management state
51 * into low-power states. No operating state is lost (ie. the cpu core
61 * In addition to putting peripherals into low-power states all
98 * This state consumes a minimal amount of power and requires a large
101 * restarted as if from initial power-up and kernel boot.
109 * Information about a power management state
116 * one Zephyr power state. This property allows the platform
119 * power-states {
121 * compatible = "zephyr,power-state";
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| /Zephyr-Core-2.7.6/tests/subsys/pm/power_states_api/boards/ |
| D | native_posix.overlay | 9 compatible = "test-power-states-api";
10 cpu-power-states = <&state0 &state1 &state2>;
14 compatible = "zephyr,power-state";
15 power-state-name = "suspend-to-idle";
21 compatible = "zephyr,power-state";
22 power-state-name = "suspend-to-ram";
28 compatible = "zephyr,power-state";
29 power-state-name = "standby";
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| /Zephyr-Core-2.7.6/dts/bindings/sensor/ |
| D | st,iis2dlpc-common.yaml | 27 configuration at power-up.
33 description: Range in g. Default is power-up configuration.
40 power-mode:
44 description: Specify the sensor power mode. Default is power-up configuration.
46 - 0 # Low Power M1
47 - 1 # Low Power M2
48 - 2 # Low Power M3
49 - 3 # Low Power M4
53 # All default values are selected to match the power-up values.
60 description: Tap mode. Default is power-up configuration.
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| D | st,lis2dw12-common.yaml | 31 configuration at power-up.
38 Range in g. Default is power-up configuration.
51 power-mode:
56 Specify the sensor power mode. Default is power-up configuration.
58 0 # Low Power M1
59 1 # Low Power M2
60 2 # Low Power M3
61 3 # Low Power M4
72 # All default values are selected to match the power-up values.
80 Tap mode. Default is power-up configuration.
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| /Zephyr-Core-2.7.6/samples/bluetooth/hci_pwr_ctrl/ |
| D | README.rst | 3 Bluetooth: HCI Power Control
9 This sample application demonstrates the dynamic Tx power control over the LL
11 peripheral advertising with varying Tx power. The initial advertiser TX power
12 for the first 5s of the application is the Kconfig set default TX power. Then,
13 the TX power variation of the advertiser is a repeatedly descending staircase
14 pattern ranging from -4 dBm to -30 dBm where the Tx power levels decrease every
18 the Tx power of the peripheral device is modulated per connection accordingly
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| /Zephyr-Core-2.7.6/drivers/pm_cpu_ops/ |
| D | Kconfig | 1 # CPU power management driver configuration options
7 bool "CPU power management drivers"
9 Enable CPU power management drivers configuration
23 bool "Support for the ARM Power State Coordination Interface (PSCI)"
30 implementing the PSCI specification for CPU-centric power
32 0022A ("Power State Coordination Interface System Software on
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| /Zephyr-Core-2.7.6/dts/bindings/mtd/ |
| D | jedec,spi-nor-common.yaml | 35 Power-Down mode that is entered by command 0xB9 to reduce power
37 implies that the RDPD (0xAB) Release from Deep Power Down command
47 Some devices (Macronix MX25R in particular) wake from deep power
51 (1) tDPDD (Delay Time for Release from Deep Power-Down Mode)
52 (2) tCDRP (CSn Toggling Time before Release from Deep Power-Down Mode)
53 (3) tRDP (Recovery Time for Release from Deep Power-Down Mode)
56 used to wake the chip from Deep Power-Down mode.
66 deep power down.
78 deep power down and be ready to receive additional commands.
89 Some devices from certain vendors power-up with block protect bits
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| D | atmel,at45.yaml | 40 When set, the driver will use the Ultra-Deep Power-Down command instead
41 of the default Deep Power-Down one to put the chip into low power mode.
45 Power-Down modes is that the chip consumes far less power in the latter
53 Time, in nanoseconds, needed by the chip to enter the Deep Power-Down
54 mode (or Ultra-Deep Power-Down mode when the "use-udpd" property is set)
62 Time, in nanoseconds, needed by the chip to exit from the Deep Power-Down
63 mode (or Ultra-Deep Power-Down mode when the "use-udpd" property is set)
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| /Zephyr-Core-2.7.6/soc/arm/nuvoton_npcx/common/ |
| D | soc_pins.h | 41 * @brief NPCX Power Switch Logic (PSL) input configuration structure
44 * core power supply (VCC1) on from standby power state (ultra-low-power mode).
122 * switch or the power supply used generate the VCC1 power from the VSBY power.
123 * When PSL_OUT is high (active), the Core Domain power supply (VCC1) is turned
125 * turned off for entering standby power state (ultra-low-power mode).
133 * detect the wake-up events and the related circuit will turn on core power
134 * supply (VCC1) from standby power state (ultra-low-power mode) later.
147 * @brief Restore all connections between IO pads that support low-voltage power
155 * @brief Disable all connections between IO pads that support low-voltage power
163 * @brief Get the low-voltage power supply status of GPIO pads
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| D | power.c | 9 * @brief Nuvoton NPCX power management driver
11 * This file contains the drivers of NPCX Power Manager Modules that improves
12 * the efficiency of ec operation by adjusting the chip’s power consumption to
14 * summarizes the main properties of the various power states and shows the
15 * activity levels of the various clocks while in these power states.
18 * | Power State | LFCLK | HFCLK | APB/AHB | Core | RAM/Regs | VCC | VSBY |
23 * | Deep Sleep | On | Stop | Stop | Stop | Power Down | On | On |
36 * - The unit to determine power state residency policy is tick.
38 * this driver implements one power state, PM_STATE_SUSPEND_TO_IDLE, with
39 * two sub-states for power management system.
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| /Zephyr-Core-2.7.6/dts/bindings/lora/ |
| D | semtech,sx127x-base.yaml | 25 power-amplifier-output:
29 Selects power amplifier output pin. This is required when neither
40 Antenna power enable pin.
60 tcxo-power-gpios:
64 TCXO power enable pin.
66 tcxo-power-startup-delay-ms:
70 Delay which has to be applied after enabling TCXO power.
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| /Zephyr-Core-2.7.6/include/dt-bindings/pinctrl/ |
| D | npcx-pinctrl.h | 13 * Power Switch Logic (PSL) [ 0 : 3 ]
20 * Power Switch Logic (PSL) input wake-up mode is sensitive to edge signals.
28 * Power Switch Logic (PSL) input wake-up mode is sensitive to logical levels.
36 * The active polarity of Power Switch Logic (PSL) input is high level or
45 * The active polarity of Power Switch Logic (PSL) input is low level or
54 * Configures Power Switch Logic (PSL) input in detecting rising edge.
62 * Configures Power Switch Logic (PSL) input in detecting falling edge.
70 * Configures Power Switch Logic (PSL) input in detecting level high state (has
79 * Configures Power Switch Logic (PSL) input in detecting level low state (has
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| /Zephyr-Core-2.7.6/soc/arm/st_stm32/stm32g0/ |
| D | power.c | 22 /* Invoke Low Power/System Off specific Tasks */
26 LOG_DBG("Unsupported power state %u", info.state); in pm_power_state_set()
46 LOG_DBG("Unsupported power state substate-id %u", in pm_power_state_set()
52 /* Handle SOC specific activity after Low Power Mode Exit */
56 LOG_DBG("Unsupported power substate %u", info.state); in pm_power_state_exit_post_ops()
67 LOG_DBG("Unsupported power substate-id %u", in pm_power_state_exit_post_ops()
83 /* Initialize STM32 Power */
88 /* enable Power clock */ in stm32_power_init()
92 /* Enable the Debug Module during all and any Low power mode */ in stm32_power_init()
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| /Zephyr-Core-2.7.6/soc/arm/silabs_exx32/common/ |
| D | soc_power.c | 14 * Power state map:
20 /* Invoke Low Power/System Off specific Tasks */
23 LOG_DBG("SoC entering power state %d", info.state); in pm_power_state_set()
48 LOG_DBG("Unsupported power state %u", info.state); in pm_power_state_set()
52 LOG_DBG("SoC leaving power state %d", info.state); in pm_power_state_set()
58 /* Handle SOC specific activity after Low Power Mode Exit */
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| /Zephyr-Core-2.7.6/include/drivers/ |
| D | pm_cpu_ops.h | 12 * @brief Public API for CPU Power Management
24 * @defgroup power_management_cpu_api CPU Power Management
29 * @brief Power down the calling core
40 * @brief Power up a core
42 * This call is used to power up cores that either have not yet been booted
46 * @param cpuid CPU id to power on
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| /Zephyr-Core-2.7.6/tests/subsys/pm/power_states_api/dts/bindings/ |
| D | test-power-states-api.yaml | 6 tests/subsys/power/power_states_api test in Zephyr.
8 compatible: "test-power-states-api"
11 cpu-power-states:
14 description: List of power management states supported by this cpu.
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| /Zephyr-Core-2.7.6/dts/bindings/base/ |
| D | power.yaml | 4 # Properties for nodes with controllable power supplies.
11 GPIO specifier that controls power to the device.
14 switch that controls power to the device. The supply state is
23 Reference to the regulator that controls power to the device.
26 This property should be provided when device power is supplied
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| /Zephyr-Core-2.7.6/boards/arm/thingy52_nrf52832/ |
| D | Kconfig | 9 int "VDD power rail init priority"
13 Initialization priority for the VDD power rail. Has to be greater
17 int "CCS_VDD power rail init priority"
21 Initialization priority for the CCS_VDD power rail. This powers the
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| /Zephyr-Core-2.7.6/soc/arm/st_stm32/stm32l5/ |
| D | power.c | 30 /* Invoke Low Power/System Off specific Tasks */
34 LOG_DBG("Unsupported power state %u", info.state); in pm_power_state_set()
70 LOG_DBG("Unsupported power state substate-id %u", in pm_power_state_set()
76 /* Handle SOC specific activity after Low Power Mode Exit */
80 LOG_DBG("Unsupported power substate-id %u", info.state); in pm_power_state_exit_post_ops()
92 LOG_DBG("Unsupported power substate-id %u", in pm_power_state_exit_post_ops()
108 /* Initialize STM32 Power */
113 /* enable Power clock */ in stm32_power_init()
117 /* Enable the Debug Module during all and any Low power mode */ in stm32_power_init()
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| /Zephyr-Core-2.7.6/dts/bindings/pinctrl/ |
| D | nuvoton,npcx-pslctrl-def.yaml | 4 description: Nuvoton, NPCX Default Power Switch Logic (PSL) input pads configurations
16 signals and the related circuit will turn on core power supply
17 (VCC1) from standby power state (ultra-low-power mode) later.
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| /Zephyr-Core-2.7.6/boards/arm/mec1501modular_assy6885/ |
| D | mec1501modular_assy6885.dts | 31 power-states {
33 compatible = "zephyr,power-state";
34 power-state-name = "suspend-to-idle";
39 compatible = "zephyr,power-state";
40 power-state-name = "suspend-to-ram";
47 cpu-power-states = <&idle &suspend_to_ram>;
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