| /Zephyr-Core-3.5.0/dts/bindings/sensor/ |
| D | st,iis2dlpc-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 include: sensor-device.yaml
7 drdy-gpios:
8 type: phandle-array
16 drdy-int:
20 - 1 # drdy is generated from INT1
21 - 2 # drdy is generated from INT2
27 configuration at power-up.
32 description: Range in g. Default is power-up configuration.
34 - 16 # 16g (1.952 mg/LSB)
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| D | st,lsm6dso-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 include: sensor-device.yaml
7 irq-gpios:
8 type: phandle-array
16 int-pin:
20 - 1 # drdy is generated from INT1
21 - 2 # drdy is generated from INT2
28 configuration at power-up.
30 accel-pm:
34 Specify the accelerometer power mode.
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| D | st,lsm6dso16is-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 include: sensor-device.yaml
7 irq-gpios:
8 type: phandle-array
16 drdy-pin:
20 - 1 # drdy is generated from INT1
21 - 2 # drdy is generated from INT2
28 configuration at power-up.
30 accel-range:
34 Range in g. Default is power-up configuration.
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| D | st,lis2dw12-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 include: sensor-device.yaml
7 irq-gpios:
8 type: phandle-array
16 int-pin:
20 - 1
21 - 2
31 configuration at power-up.
37 Range in g. Default is power-up configuration.
45 - 16
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| D | st,ism330dhcx-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 include: sensor-device.yaml
7 drdy-gpios:
8 type: phandle-array
16 int-pin:
29 configuration at power-up.
31 - 1
32 - 2
34 accel-odr:
39 Default is power-up configuration.
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| D | st,iis2iclx-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 include: sensor-device.yaml
7 drdy-gpios:
8 type: phandle-array
15 int-pin:
19 - 1 # drdy is generated from INT1
20 - 2 # drdy is generated from INT2
26 configuration at power-up.
31 description: Range in g. Default is power-up configuration.
33 - 0 # 500mg (0.015 mg/LSB)
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| D | st,lsm6dsv16x-common.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 include: sensor-device.yaml
7 irq-gpios:
8 type: phandle-array
16 drdy-pin:
20 - 1 # drdy is generated from INT1
21 - 2 # drdy is generated from INT2
28 configuration at power-up.
30 accel-range:
34 Range in g. Default is power-up configuration.
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| /Zephyr-Core-3.5.0/dts/bindings/base/ |
| D | pm.yaml | 2 # SPDX-License-Identifier: Apache-2.0
4 # Properties for Power Management (PM)
7 wakeup-source:
10 Property to identify that a device can be used as wake up source.
14 wake up the system.
16 Wake up capable devices are disabled (interruptions will not wake up
19 power-domain:
23 Power domain the device belongs to.
25 The device will be notified when the power domain it belongs to is either
28 zephyr,pm-device-runtime-auto:
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| /Zephyr-Core-3.5.0/soc/arm/nuvoton_npcx/common/ |
| D | power.c | 4 * SPDX-License-Identifier: Apache-2.0
9 * @brief Nuvoton NPCX power management driver
11 * This file contains the drivers of NPCX Power Manager Modules that improves
12 * the efficiency of ec operation by adjusting the chip’s power consumption to
14 * summarizes the main properties of the various power states and shows the
15 * activity levels of the various clocks while in these power states.
17 * +--------------------------------------------------------------------------+
18 * | Power State | LFCLK | HFCLK | APB/AHB | Core | RAM/Regs | VCC | VSBY |
19 * |--------------------------------------------------------------------------|
23 * | Deep Sleep | On | Stop | Stop | Stop | Power Down | On | On |
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| /Zephyr-Core-3.5.0/doc/services/pm/ |
| D | system.rst | 1 .. _pm-system:
3 System Power Management
7 the :kconfig:option:`CONFIG_PM` Kconfig option, the Power Management
8 Subsystem can put an idle system in one of the supported power states, based
9 on the selected power management policy and the duration of the idle time
12 It is an application responsibility to set up a wake up event. A wake up event
14 such as a SysTick, RTC, counter, or GPIO. Depending on the power mode entered,
15 only some SoC peripheral modules may be active and can be used as a wake up
18 The following diagram describes system power management:
20 .. image:: images/system-pm.svg
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| /Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/cavs/ |
| D | sram.c | 2 * SPDX-License-Identifier: Apache-2.0
25 * Function powers up a number of memory banks provided as an argument
36 /* Add some delay before touch power register */ in hp_sram_pm_banks()
44 ebb_avail_mask0 = (uint32_t)GENMASK(EBB_SEG_SIZE - 1, 0); in hp_sram_pm_banks()
45 ebb_avail_mask1 = (uint32_t)GENMASK(total_banks_count - in hp_sram_pm_banks()
46 EBB_SEG_SIZE - 1, 0); in hp_sram_pm_banks()
48 ebb_avail_mask0 = (uint32_t)GENMASK(total_banks_count - 1, 0); in hp_sram_pm_banks()
52 /* bit masks of banks that have to be powered up in each segment */ in hp_sram_pm_banks()
54 ebb_mask0 = (uint32_t)GENMASK(EBB_SEG_SIZE - 1, 0); in hp_sram_pm_banks()
55 ebb_mask1 = (uint32_t)GENMASK(banks - EBB_SEG_SIZE - 1, in hp_sram_pm_banks()
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| /Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/ace/include/intel_ace15_mtpm/ |
| D | adsp_power.h | 3 * SPDX-License-Identifier: Apache-2.0
17 /* Power Control register - controls the power domain operations. */
34 /* Power Status register - reports the power domain status. */
50 * @brief Power up a specific CPU.
52 * This sets the "not power gating" bit in the power control
53 * register to disable power gating to CPU, thus powering up
56 * @param cpu_num CPU to be powered up.
60 ACE_PWRCTL->wpdsphpxpg |= BIT(cpu_num); in soc_cpu_power_up()
64 * @brief Power down a specific CPU.
66 * This clears the "not power gating" bit in the power control
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| /Zephyr-Core-3.5.0/soc/xtensa/intel_adsp/ace/include/intel_ace20_lnl/ |
| D | adsp_power.h | 3 * SPDX-License-Identifier: Apache-2.0
29 /* Power control */
50 * @brief Power up a specific CPU.
52 * This sets the "not power gating" bit in the power control
53 * register to disable power gating to CPU, thus powering up
56 * @param cpu_num CPU to be powered up.
60 ACE_PWRCTL->wpdsphpxpg |= BIT(cpu_num); in soc_cpu_power_up()
64 * @brief Power down a specific CPU.
66 * This clears the "not power gating" bit in the power control
67 * register to enable power gating to CPU, thus powering down
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| /Zephyr-Core-3.5.0/include/zephyr/drivers/ |
| D | pm_cpu_ops.h | 4 * SPDX-License-Identifier: Apache-2.0
12 * @brief Public API for CPU Power Management
27 * @defgroup power_management_cpu_api CPU Power Management
33 * @brief Power down the calling core
36 * cpu_off can only be powered up again in response to a cpu_on
39 * @retval -ENOTSUP If the operation is not supported
44 * @brief Power up a core
46 * This call is used to power up cores that either have not yet been booted
50 * @param cpuid CPU id to power on
54 * @retval -ENOTSUP If the operation is not supported
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| /Zephyr-Core-3.5.0/drivers/counter/ |
| D | Kconfig.mcux_snvs | 4 # SPDX-License-Identifier: Apache-2.0
11 Enable support for the IMX SNVS High/Low Power clock.
14 bool "IMX SNVS SRTC low power support"
18 Enable the low power SRTC in SNVS to synchronise.
21 bool "IMX SNVS wake-up on SRTC alarm"
25 Assert Wake-Up Interrupt on SRTC alarm
|
| /Zephyr-Core-3.5.0/boards/arm/thingy53_nrf5340/ |
| D | board.c | 4 * SPDX-License-Identifier: Apache-2.0
16 * could be accessed after power up. In particular bme680 and bmm150 sensors require,
17 * respectively 2ms and 1ms power on delay. In order to avoid delays sum, common delay is
18 * introduced in the board start up file. Below asserts ensure correct initialization order:
43 NRF_SPU->EXTDOMAIN[0].PERM = 1 << 4; in enable_cpunet()
49 * building also a Non-Secure image. The Non-Secure image will, in in enable_cpunet()
67 * sensors could be accessed after power up. In particular bme680 and bmm150 in setup()
68 * sensors require, 2ms and 1ms power on delay respectively. In order not to sum in setup()
69 * delays, common delay is introduced in the board start up file. This code is in setup()
70 * executed after sensors are powered up and before their initialization. in setup()
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| /Zephyr-Core-3.5.0/soc/arm64/arm/fvp_aemv8r/ |
| D | Kconfig.soc | 2 # SPDX-License-Identifier: Apache-2.0
17 bool "Simulate CPU Power Management for FVP_BaseR_AEMv8R"
20 It simulates the cpu power management function for
21 FVP_BaseR_AEMv8R. When zephyr kernel try to bring up secondary
23 it indeed bring up secondary core successfully.
|
| /Zephyr-Core-3.5.0/boards/arm/nrf5340dk_nrf5340/ |
| D | nrf5340_cpuapp_common-pinctrl.dtsi | 3 * SPDX-License-Identifier: Apache-2.0
18 low-power-enable;
30 bias-pull-up;
40 low-power-enable;
53 low-power-enable;
65 nordic,drive-mode = <NRF_DRIVE_H0H1>;
76 low-power-enable;
80 low-power-enable;
81 bias-pull-up;
91 bias-pull-up;
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| /Zephyr-Core-3.5.0/dts/bindings/counter/ |
| D | espressif,esp32-rtc-timer.yaml | 2 # SPDX-License-Identifier: Apache-2.0
8 Any reset/sleep mode, except for the power-up reset, will not
14 running from power-up.
19 slow-clk-freq:
25 compatible: "espressif,esp32-rtc-timer"
|
| /Zephyr-Core-3.5.0/samples/boards/stm32/power_mgmt/serial_wakeup/ |
| D | sample.yaml | 2 name: STM32 Power Management Serial Wakeup
6 - UART
7 - Wake
8 - up
9 - power
14 - "Device is wakeup capable"
15 - "Wakeup source enable ok"
16 - "Wakeup source enabled"
18 - nucleo_wb55rg
19 filter: dt_compat_enabled("zephyr,power-state")
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| /Zephyr-Core-3.5.0/soc/arm/st_stm32/stm32l5/ |
| D | power.c | 4 * SPDX-License-Identifier: Apache-2.0
23 /* select MSI as wake-up system clock if configured, HSI otherwise */
30 /* Invoke Low Power/System Off specific Tasks */
34 LOG_DBG("Unsupported power state %u", state); in pm_state_set()
38 /* ensure the proper wake-up system clock */ in pm_state_set()
58 LOG_DBG("Unsupported power state substate-id %u", in pm_state_set()
68 /* Handle SOC specific activity after Low Power Mode Exit */
72 LOG_DBG("Unsupported power substate-id %u", state); in pm_state_exit_post_ops()
84 LOG_DBG("Unsupported power substate-id %u", in pm_state_exit_post_ops()
100 /* Initialize STM32 Power */
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| /Zephyr-Core-3.5.0/soc/arm/st_stm32/stm32u5/ |
| D | power.c | 4 * SPDX-License-Identifier: Apache-2.0
22 /* select MSI as wake-up system clock if configured, HSI otherwise */
31 /* ensure the proper wake-up system clock */ in set_mode_stop()
45 LOG_DBG("Unsupported power state substate-id %u", substate_id); in set_mode_stop()
57 /* Invoke Low Power/System Off specific Tasks */
69 LOG_DBG("Unsupported power state %u", state); in pm_state_set()
80 /* Handle SOC specific activity after Low Power Mode Exit */
89 LOG_DBG("Unsupported power substate-id %u", in pm_state_exit_post_ops()
100 LOG_DBG("Unsupported power state %u", state); in pm_state_exit_post_ops()
114 /* Initialize STM32 Power */
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| /Zephyr-Core-3.5.0/tests/boards/altera_max10/i2c_master/src/ |
| D | i2c_master.c | 4 * SPDX-License-Identifier: Apache-2.0
14 * https://ez.analog.com/docs/DOC-1986
35 TC_PRINT("Powering up ADV7513\n"); in powerup_adv7513()
49 /* write to power control registers */ in powerup_adv7513()
58 TC_PRINT("failed to read Power state\n"); in powerup_adv7513()
61 TC_PRINT("Power state 0x%x\n", data); in powerup_adv7513()
83 /* Power up ADV7513 */ in test_i2c_adv7513()
85 "ADV7513 power up failed"); in test_i2c_adv7513()
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| /Zephyr-Core-3.5.0/soc/arm/ti_simplelink/cc13x2_cc26x2/ |
| D | power.c | 4 * SPDX-License-Identifier: Apache-2.0
14 #include <ti/drivers/Power.h>
15 #include <ti/drivers/power/PowerCC26X2.h>
38 /* Configuring TI Power module to not use its policy function (we use Zephyr's
54 * Power state mapping:
59 /* Invoke Low Power/System Off specific Tasks */
67 LOG_DBG("SoC entering power state %d", state); in pm_state_set()
70 * we are only able to wake up from standby while using PRIMASK. in pm_state_set()
89 * 4. Turn off the CPU power domain in pm_state_set()
109 LOG_DBG("Unsupported power state %u", state); in pm_state_set()
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| /Zephyr-Core-3.5.0/boards/arm/raytac_mdbt50q_db_40_nrf52840/ |
| D | raytac_mdbt50q_db_40_nrf52840-pinctrl.dtsi | 3 * SPDX-License-Identifier: Apache-2.0
15 bias-pull-up;
25 low-power-enable;
32 bias-pull-up;
43 low-power-enable;
58 low-power-enable;
73 low-power-enable;
91 low-power-enable;
108 low-power-enable;
125 low-power-enable;
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