Searched full:pwr (Results 1 – 25 of 109) sorted by relevance
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| /Zephyr-latest/dts/bindings/ieee802154/ |
| D | atmel,rf2xx.yaml | 57 tx-pwr-table:
63 for all transceivers. This property must be used with tx-pwr-min and
64 tx-pwr-max for normal operations. The number of elements is defined by
65 the size of the tx-pwr-table array property. The max entry value for
71 linear_step = (tx-pwr-max - tx-pwr-min)
72 / (sizeof(tx-pwr-table) - 1.0);
73 table_index = abs((value_in_dbm - tx-pwr-max) / linear_step);
74 output_power = tx-pwr-table[table_index];
77 tx-pwr-min = -17 dBm and tx-pwr-max = +4 dBm. Using 48 elements in the
78 tx-pwr-table array. The table array is filled from higher to lower power.
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| /Zephyr-latest/boards/shields/nrf7002eb/ |
| D | nrf7002eb.overlay | 33 wifi-max-tx-pwr-2g-dsss = <21>;
34 wifi-max-tx-pwr-2g-mcs0 = <16>;
35 wifi-max-tx-pwr-2g-mcs7 = <16>;
36 wifi-max-tx-pwr-5g-low-mcs0 = <13>;
37 wifi-max-tx-pwr-5g-low-mcs7 = <13>;
38 wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
39 wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
40 wifi-max-tx-pwr-5g-high-mcs0 = <12>;
41 wifi-max-tx-pwr-5g-high-mcs7 = <12>;
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| /Zephyr-latest/boards/shields/nrf7002ek/ |
| D | nrf7002ek_common_5g.dtsi | 7 wifi-max-tx-pwr-5g-low-mcs0 = <13>;
8 wifi-max-tx-pwr-5g-low-mcs7 = <13>;
9 wifi-max-tx-pwr-5g-mid-mcs0 = <13>;
10 wifi-max-tx-pwr-5g-mid-mcs7 = <13>;
11 wifi-max-tx-pwr-5g-high-mcs0 = <12>;
12 wifi-max-tx-pwr-5g-high-mcs7 = <12>;
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| D | nrf7002ek_common.dtsi | 21 wifi-max-tx-pwr-2g-dsss = <21>;
22 wifi-max-tx-pwr-2g-mcs0 = <16>;
23 wifi-max-tx-pwr-2g-mcs7 = <16>;
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| /Zephyr-latest/boards/nordic/nrf7002dk/ |
| D | nrf70_common_5g.dtsi | 7 wifi-max-tx-pwr-5g-low-mcs0 = <9>;
8 wifi-max-tx-pwr-5g-low-mcs7 = <9>;
9 wifi-max-tx-pwr-5g-mid-mcs0 = <11>;
10 wifi-max-tx-pwr-5g-mid-mcs7 = <11>;
11 wifi-max-tx-pwr-5g-high-mcs0 = <13>;
12 wifi-max-tx-pwr-5g-high-mcs7 = <13>;
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| D | nrf70_common.dtsi | 12 wifi-max-tx-pwr-2g-dsss = <21>;
13 wifi-max-tx-pwr-2g-mcs0 = <16>;
14 wifi-max-tx-pwr-2g-mcs7 = <16>;
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| /Zephyr-latest/dts/bindings/wifi/ |
| D | wifi-tx-power-5g.yaml | 17 wifi-max-tx-pwr-5g-low-mcs0:
21 wifi-max-tx-pwr-5g-low-mcs7:
25 wifi-max-tx-pwr-5g-mid-mcs0:
29 wifi-max-tx-pwr-5g-mid-mcs7:
33 wifi-max-tx-pwr-5g-high-mcs0:
37 wifi-max-tx-pwr-5g-high-mcs7:
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| D | wifi-tx-power-2g.yaml | 12 wifi-max-tx-pwr-2g-dsss:
16 wifi-max-tx-pwr-2g-mcs0:
20 wifi-max-tx-pwr-2g-mcs7:
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| /Zephyr-latest/boards/nordic/thingy52/ |
| D | thingy52_nrf52832.dts | 76 vdd_pwr: vdd-pwr-ctrl {
78 regulator-name = "vdd-pwr-ctrl";
84 spk_pwr: spk-pwr-ctrl {
86 regulator-name = "spk-pwr-ctrl";
90 mpu_pwr: mpu-pwr-ctrl {
92 regulator-name = "mpu-pwr-ctrl";
97 mic_pwr: mic-pwr-ctrl {
99 regulator-name = "mic-pwr-ctrl";
104 ccs_pwr: ccs-pwr-ctrl {
106 regulator-name = "ccs-pwr-ctrl";
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| /Zephyr-latest/include/zephyr/drivers/misc/stm32_wkup_pins/ |
| D | stm32_wkup_pins.h | 9 * @brief Public APIs for STM32 PWR wake-up pins configuration
22 * @brief Configure a GPIO pin as a source for STM32 PWR wake-up pins
32 * GPIO Ports that are associated with STM32 PWR wake-up pins
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| /Zephyr-latest/samples/subsys/usb_c/sink/ |
| D | README.rst | 60 PWR 3A0
75 Unconstrained Pwr: 1
86 Unconstrained Pwr: 0
97 Unconstrained Pwr: 0
108 Unconstrained Pwr: 0
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| /Zephyr-latest/samples/drivers/led/led_strip/boards/ |
| D | blueclover_plt_demo_v2_nrf52832.overlay | 8 led_pwr: led-pwr-ctrl {
10 regulator-name = "led-pwr-ctrl";
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| /Zephyr-latest/boards/seco/stm32f3_seco_d23/ |
| D | stm32f3_seco_d23.dts | 36 out_3p3v_pwr: 3p3v-out-pwr-ctrl {
38 regulator-name = "3p3v-out-pwr-ctrl";
45 out_gpio_bufa_pwr: out-gpio-bufa-pwr-ctrl {
47 regulator-name = "out-gpio-bufa-pwr-ctrl";
53 out_gpio_bufb_pwr: out-gpio-bufb-pwr-ctrl {
55 regulator-name = "out-gpio-bufb-pwr-ctrl";
61 in_gpio_buf_pwr: in-gpio-buf-pwr-ctrl {
63 regulator-name = "in-gpio-buf-pwr-ctrl";
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| /Zephyr-latest/dts/bindings/gpio/ |
| D | atmel-xplained-pro-header.yaml | 11 debugger connected should be called EXT7. PWR, EXT1, EXT2 and EXT3 are
14 * PWR is right angled at the top right hand side of the board. This
17 below the PWR header. This header must always be present.
22 All MCU boards have to implement at least PWR, EXT1, EXT2 (on medium and
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| /Zephyr-latest/dts/bindings/sensor/ |
| D | invensense,icm42688.yaml | 18 accel-pwr-mode = <ICM42688_ACCEL_LN>;
21 gyro-pwr-mode= <ICM42688_GYRO_LN>;
36 accel-pwr-mode:
82 gyro-pwr-mode:
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| /Zephyr-latest/boards/seeed/lora_e5_dev_board/ |
| D | lora_e5_dev_board.dts | 56 pwr_3v3: pwr-3v3-ctrl {
58 * PWR rail for SPI-flash, Temp-Sensor, RS-485 Transceiver,
63 regulator-name = "pwr-3v3-ctrl";
69 pwr_5v: pwr-5v-ctrl {
75 regulator-name = "pwr-5v-ctrl";
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| /Zephyr-latest/doc/hardware/peripherals/sensor/ |
| D | device_tree.rst | 22 accel-pwr-mode = <ICM42688_ACCEL_LN>; /* Low noise mode */
25 gyro-pwr-mode = <ICM42688_GYRO_LN>; /* Low noise mode */
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| /Zephyr-latest/samples/boards/st/power_mgmt/wkup_pins/boards/ |
| D | nucleo_l4r5zi.overlay | 13 &pwr {
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| D | nucleo_u575zi_q.overlay | 13 &pwr {
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| D | nucleo_u5a5zj_q.overlay | 13 &pwr {
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| D | nucleo_wl55jc.overlay | 13 &pwr {
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| /Zephyr-latest/soc/st/stm32/ |
| D | Kconfig | 54 bool "STM32 PWR Wake-up Pins"
57 Enable support for STM32 PWR wake-up pins.
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| /Zephyr-latest/include/zephyr/drivers/dma/ |
| D | dma_mcux_lpc.h | 50 #define LPC_DMA_BURSTPOWER(pwr) (((pwr) & 0x7) << 5) argument
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| /Zephyr-latest/samples/boards/st/power_mgmt/wkup_pins/ |
| D | sample.yaml | 7 "gpio-keys") and dt_compat_enabled("st,stm32-pwr")
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| /Zephyr-latest/dts/bindings/display/ |
| D | ultrachip,uc81xx-common.yaml | 46 pwr:
48 description: Power Setting (PWR) values
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