| /Zephyr-latest/drivers/pwm/ |
| D | Kconfig | 1 # PWM configuration options
6 menuconfig PWM config
7 bool "Pulse Width Modulation (PWM) drivers"
9 Enable config options for PWM drivers.
11 if PWM
13 module = PWM
14 module-str = pwm
18 int "PWM initialization priority"
21 System initialization priority for PWM drivers.
24 bool "PWM shell"
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| D | pwm_ene_kb1200.c | 9 #include <zephyr/drivers/pwm.h>
11 #include <reg/pwm.h>
15 /* pwm controller base address */
16 struct pwm_regs *pwm; member
22 /* PWM cycles per second */
26 /* PWM api functions */
30 /* Single channel for each pwm device */ in pwm_kb1200_set_cycles()
38 * Calculate PWM prescaler that let period_cycles map to in pwm_kb1200_set_cycles()
39 * maximum pwm period cycles and won't exceed it. in pwm_kb1200_set_cycles()
47 /* If pulse_cycles is 0, switch PWM off and return. */ in pwm_kb1200_set_cycles()
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| D | pwm_npcx.c | 10 #include <zephyr/drivers/pwm.h>
20 /* 16-bit period cycles/prescaler in NPCX PWM modules */
24 /* PWM clock sources */
30 /* PWM heart-beat mode selection */
38 /* pwm controller base address */
48 /* PWM cycles per second */
52 /* PWM local functions */
58 /* Disable PWM for module configuration first */ in pwm_npcx_configure()
61 /* Set default PWM polarity to normal */ in pwm_npcx_configure()
64 /* Turn off PWM heart-beat mode */ in pwm_npcx_configure()
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| D | pwm_sam.c | 11 #include <zephyr/drivers/pwm.h>
26 Pwm *regs;
52 Pwm * const pwm = config->regs; in sam_pwm_set_cycles() local
75 if (pwm->PWM_CH_NUM[channel].PWM_CMR != cmr) { in sam_pwm_set_cycles()
76 pwm->PWM_DIS = 1 << channel; in sam_pwm_set_cycles()
78 pwm->PWM_CH_NUM[channel].PWM_CMR = cmr; in sam_pwm_set_cycles()
79 pwm->PWM_CH_NUM[channel].PWM_CPRD = period_cycles; in sam_pwm_set_cycles()
80 pwm->PWM_CH_NUM[channel].PWM_CDTY = pulse_cycles; in sam_pwm_set_cycles()
83 * change is triggered at the next PWM period. in sam_pwm_set_cycles()
85 pwm->PWM_CH_NUM[channel].PWM_CPRDUPD = period_cycles; in sam_pwm_set_cycles()
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| D | Kconfig.imx | 1 # i.MX PWM Config
7 bool "i.MX PWM Driver"
12 Enable support for i.MX pwm driver.
15 int "Loop count for PWM Software Reset"
19 Loop count for PWM Software Reset when disabling PWM channel.
|
| /Zephyr-latest/tests/drivers/pwm/pwm_api/ |
| D | testcase.yaml | 2 drivers.pwm:
5 - pwm
7 filter: dt_alias_exists("pwm-0") or dt_alias_exists("pwm-1") or dt_alias_exists("pwm-2")
8 or dt_alias_exists("pwm-3") or dt_compat_enabled("st,stm32-pwm")
9 or dt_compat_enabled("intel,blinky-pwm") or dt_compat_enabled("nordic,nrf-pwm")
10 depends_on: pwm
11 drivers.pwm.ke1xz_pwm_flexio:
14 - pwm
20 filter: (dt_alias_exists("pwm-0") or dt_alias_exists("pwm-1") or dt_alias_exists("pwm-2")
21 or dt_alias_exists("pwm-3")) and CONFIG_DT_HAS_NXP_FLEXIO_ENABLED and
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| /Zephyr-latest/tests/drivers/build_all/pwm/ |
| D | testcase.yaml | 5 - pwm
7 drivers.pwm.cc13xx_cc26xx_timer.build:
9 drivers.pwm.gecko.build:
11 drivers.pwm.imx.build:
13 drivers.pwm.litex.build:
15 drivers.pwm.mcux.ftm.build:
17 drivers.pwm.mcux.pwt.build:
21 drivers.pwm.mcux.tpm.build:
23 drivers.pwm.mcux.build:
25 drivers.pwm.mcux.sctimer.build:
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| /Zephyr-latest/dts/bindings/pwm/ |
| D | telink,b91-pwm.yaml | 5 description: Telink B91 PWM
7 include: [pwm-controller.yaml, pinctrl-device.yaml, base.yaml]
9 compatible: "telink,b91-pwm"
19 description: Default PWM Peripheral Clock frequency in Hz (is used if 32K Clock is disabled)
23 description: Enable 32K Source Clock for PWM Channel 0
27 description: Enable 32K Source Clock for PWM Channel 1
31 description: Enable 32K Source Clock for PWM Channel 2
35 description: Enable 32K Source Clock for PWM Channel 3
39 description: Enable 32K Source Clock for PWM Channel 4
43 description: Enable 32K Source Clock for PWM Channel 5
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| D | ti,cc13xx-cc26xx-timer-pwm.yaml | 5 TI SimpleLink CC13xx/CC26xx GPT timer PWM Controller Node
7 To configure a PWM node, you first need to define a board overlay with a
8 pinctrl configuration for the pin on which the PWM signal should be present:
19 following port events must be used for PWM:
27 output and actively driven by the PWM driver.
29 Then enable the corresponding timer and PWM nodes and add a reference to the
42 Now you can programmatically enable the PWM signal in your code:
44 static const struct device *pwm = DEVICE_DT_GET(DT_NODELABEL(pwm0));
52 if (!device_is_ready(pwm)) {
53 LOG_ERR("Error: PWM device %s is not ready\n", pwm->name);
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| D | nordic,nrf-sw-pwm.yaml | 1 description: nRFx S/W PWM
3 compatible: "nordic,nrf-sw-pwm"
5 include: [pwm-controller.yaml, base.yaml]
12 Reference to TIMER or RTC instance for generating PWM output signals
18 Clock prescaler for RTC or TIMER used for generating PWM output signals.
20 RTC: needs to be set to 0, which gives 32768 Hz base clock for PWM
23 TIMER: 16 MHz / 2^prescaler base clock is used for PWM generation.
29 An array of GPIOs assigned as outputs for the PWM channels. The number
30 of items in this array determines the number of channels that this PWM
36 sw_pwm: sw-pwm {
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| D | nxp,s32-emios-pwm.yaml | 5 NXP S32 eMIOS PWM node for S32 SoCs. Each channel in eMIOS can be configured
6 to use for PWM operation. There are several PWM modes supported by this module,
16 emios0_pwm: pwm {
19 pwm-mode = "OPWFMB";
29 pwm-mode = "OPWMB";
38 pwm-mode = "OPWMCB_LEAD_EDGE";
46 pwm-mode = "SAIC";
53 phandle 'master-bus'. For OPWMB mode, PWM's period is master bus's period and
58 compatible: "nxp,s32-emios-pwm"
60 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
[all …]
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| D | nxp,imx-pwm.yaml | 4 description: NXP MCUX PWM
6 compatible: "nxp,imx-pwm"
8 include: [pwm-controller.yaml, pinctrl-device.yaml, base.yaml]
22 Enable for PWM to keep running in WAIT mode.
27 Enable for PWM to keep running in debug mode.
34 Clock prescaler at the input of the PWM.
46 "half-cycle" - registers loaded on a PWM half cycle;
47 "full-cycle" - registers loaded on a PWM full cycle;
48 "half-and-full-cycle" - registers loaded on a PWM half & full cycle.
50 "#pwm-cells":
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| D | nxp,flexio-pwm.yaml | 4 description: NXP Flexio PWM controller.
5 Each flexio timer can be used for generating one pwm pulse.
6 The two PWM modes supported by flexio are chosen based on the selected polarity -
7 Dual 8-bit counters PWM mode and Dual 8-bit counters PWM Low mode.
9 compatible: "nxp,flexio-pwm"
11 include: [pwm-controller.yaml, pinctrl-device.yaml, base.yaml]
20 "#pwm-cells":
23 pwm-cells:
30 Flexio PWM channel configuration.
|
| D | nuvoton,npcx-pwm.yaml | 4 description: Nuvoton, NPCX Pulse Width Modulator (PWM) node
6 compatible: "nuvoton,npcx-pwm"
8 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
19 pwm-channel:
22 A index to indicate PWM module that generates a single PWM signal.
27 Select a specific input clock source for the PWM module. If this
33 pwm-cells:
|
| D | intel,blinky-pwm.yaml | 5 description: Intel blinky PWM
7 compatible: "intel,blinky-pwm"
9 include: [pwm-controller.yaml, base.yaml]
18 description: PWM control register offset from base
23 description: PWM Peripheral Clock frequency in Hz
30 "#pwm-cells":
33 pwm-cells:
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| D | zephyr,fake-pwm.yaml | 5 This binding provides a fake PWM for use as either a stub or a mock in Zephyr
8 compatible: "zephyr,fake-pwm"
10 include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
13 "#pwm-cells":
16 Number of items to expect in a PWM
17 - channel of the timer used for PWM
24 pwm-cells:
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| D | atmel,sam-pwm.yaml | 4 description: Atmel SAM PWM
6 compatible: "atmel,sam-pwm"
10 - name: pwm-controller.yaml
26 description: Clock prescaler at the input of the PWM (0 to 10)
31 description: Clock divider at the input of the PWM (1 to 255)
33 "#pwm-cells":
36 pwm-cells:
|
| /Zephyr-latest/include/zephyr/drivers/ |
| D | pwm.h | 10 * @brief Public PWM Driver APIs
17 * @brief PWM Interface
18 * @defgroup pwm_interface PWM Interface
34 #include <zephyr/dt-bindings/pwm/pwm.h>
41 * @name PWM capture configuration flags
54 /** PWM pin capture captures period. */
57 /** PWM pin capture captures pulse width. */
60 /** PWM pin capture captures both period and pulse width. */
64 /** PWM pin capture captures a single period/pulse width. */
67 /** PWM pin capture captures period/pulse width continuously. */
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| /Zephyr-latest/include/zephyr/dt-bindings/pwm/ |
| D | pwm.h | 10 * @brief PWM Interface
11 * @defgroup pwm_interface PWM Interface
17 * @name PWM period set helpers
18 * The period cell in the PWM specifier needs to be provided in nanoseconds.
23 /** Specify PWM period in nanoseconds */
25 /** Specify PWM period in microseconds */
27 /** Specify PWM period in milliseconds */
29 /** Specify PWM period in seconds */
31 /** Specify PWM frequency in hertz */
33 /** Specify PWM frequency in kilohertz */
[all …]
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| /Zephyr-latest/tests/drivers/pwm/pwm_loopback/src/ |
| D | test_pwm_loopback.c | 8 #include <zephyr/drivers/pwm.h>
25 /* PWM generator device */ in get_test_pwms()
27 out->pwm = PWM_LOOPBACK_OUT_CHANNEL; in get_test_pwms()
29 zassert_true(device_is_ready(out->dev), "pwm loopback output device is not ready"); in get_test_pwms()
31 /* PWM capture device */ in get_test_pwms()
33 in->pwm = PWM_LOOPBACK_IN_CHANNEL; in get_test_pwms()
35 zassert_true(device_is_ready(in->dev), "pwm loopback input device is not ready"); in get_test_pwms()
51 TC_PRINT("Testing PWM capture @ %u/%u nsec\n", in test_capture()
53 err = pwm_set(out.dev, out.pwm, period, pulse, out.flags ^= in test_capture()
58 TC_PRINT("Testing PWM capture @ %u/%u usec\n", in test_capture()
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| /Zephyr-latest/dts/arm/gd/gd32e50x/ |
| D | gd32e507xe.dtsi | 23 pwm {
24 compatible = "gd,gd32-pwm";
26 #pwm-cells = <3>;
40 pwm {
41 compatible = "gd,gd32-pwm";
43 #pwm-cells = <3>;
57 pwm {
58 compatible = "gd,gd32-pwm";
60 #pwm-cells = <3>;
74 pwm {
[all …]
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| /Zephyr-latest/samples/basic/rgb_led/ |
| D | README.rst | 2 :name: PWM RGB LED
5 Drive an RGB LED using the PWM API.
10 This is a sample app which drives an RGB LED using the :ref:`PWM API <pwm_api>`.
13 is driven by a PWM port where the pulse width is changed from zero to the period
23 The board must have red, green, and blue LEDs connected via PWM output channels.
25 The LED PWM channels must be configured using the following :ref:`devicetree
29 - ``red-pwm-led``
30 - ``green-pwm-led``
31 - ``blue-pwm-led``
38 Unsupported board: red-pwm-led devicetree alias is not defined
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| /Zephyr-latest/dts/arm/ene/ |
| D | kb1200.dtsi | 134 pwm0: pwm@40210000 {
135 compatible = "ene,kb1200-pwm";
137 #pwm-cells = <3>;
141 pwm1: pwm@40210010 {
142 compatible = "ene,kb1200-pwm";
144 #pwm-cells = <3>;
148 pwm2: pwm@40210020 {
149 compatible = "ene,kb1200-pwm";
151 #pwm-cells = <3>;
155 pwm3: pwm@40210030 {
[all …]
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| /Zephyr-latest/samples/drivers/led/pwm/ |
| D | README.rst | 1 .. zephyr:code-sample:: led-pwm
2 :name: LED PWM
5 Control PWM LEDs using the LED API.
10 This sample allows to test the led-pwm driver. The first "pwm-leds" compatible
18 For each PWM LEDs (one after the other):
31 This sample can be built and executed on all the boards with PWM LEDs connected.
33 device node must match "pwm-leds". And for each LED, a child node must be
34 defined and the PWM configuration must be provided through a "pwms" phandle's
|
| /Zephyr-latest/drivers/clock_control/ |
| D | Kconfig.pwm | 5 bool "Generic PWM clock"
8 select PWM
10 Enable generic PWM clock.
13 int "Initialization priority of the pwm clock device"
17 Initialization priority of the PWM clock device. Must be
18 lower priority than PWM.
|
