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/Zephyr-latest/dts/bindings/clock/
Dst,stm32l0-pll-clock.yaml14 with f(VCO clock) = f(PLL clock input) × PLLMUL --> PLLVCO
49 programmed to output a 96 MHz frequency (USBCLK = PLLVCO/2).
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_h7.c995 float_t pllfracn, pllvco; local
1030 pllvco = ((float_t)HSE_VALUE / (float_t)pllm) *
1036 pllvco = ((float_t)CSI_VALUE / (float_t)pllm) *
1045 pllvco = ((float_t)hsivalue / (float_t)pllm) *
1053 sysclk = (uint32_t)(float_t)(pllvco/(float_t)pllp);