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/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dch32v003-pinctrl.h42 #define TIM1_ETR_PC5_0 CH32V003_PINMUX_DEFINE(PC, 5, TIM1, 0)
43 #define TIM1_ETR_PC5_1 CH32V003_PINMUX_DEFINE(PC, 5, TIM1, 1)
45 #define TIM1_ETR_PC2_3 CH32V003_PINMUX_DEFINE(PC, 2, TIM1, 3)
47 #define TIM1_CH1_PC6_1 CH32V003_PINMUX_DEFINE(PC, 6, TIM1, 1)
49 #define TIM1_CH1_PC4_3 CH32V003_PINMUX_DEFINE(PC, 4, TIM1, 3)
51 #define TIM1_CH2_PC7_1 CH32V003_PINMUX_DEFINE(PC, 7, TIM1, 1)
53 #define TIM1_CH2_PC7_3 CH32V003_PINMUX_DEFINE(PC, 7, TIM1, 3)
54 #define TIM1_CH3_PC3_0 CH32V003_PINMUX_DEFINE(PC, 3, TIM1, 0)
55 #define TIM1_CH3_PC0_1 CH32V003_PINMUX_DEFINE(PC, 0, TIM1, 1)
56 #define TIM1_CH3_PC3_2 CH32V003_PINMUX_DEFINE(PC, 3, TIM1, 2)
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/Zephyr-latest/arch/arm/core/cortex_a_r/
Dvector_table.S22 ldr pc, =z_arm_reset /* offset 0 */
23 ldr pc, =z_arm_undef_instruction /* undef instruction offset 4 */
24 ldr pc, =z_arm_svc /* svc offset 8 */
25 ldr pc, =z_arm_prefetch_abort /* prefetch abort offset 0xc */
26 ldr pc, =z_arm_data_abort /* data abort offset 0x10 */
29 ldr pc, =_isr_wrapper /* IRQ offset 0x18 */
31 ldr pc, =z_irq_spurious
34 ldr pc, =z_arm_nmi /* FIQ offset 0x1c */
36 ldr pc,=z_irq_spurious
/Zephyr-latest/arch/xtensa/core/
Dxtensa_backtrace.c23 static inline uint32_t xtensa_cpu_process_stack_pc(uint32_t pc) in xtensa_cpu_process_stack_pc() argument
25 if (pc & 0x80000000) { in xtensa_cpu_process_stack_pc()
30 pc = (pc & 0x3fffffff) | mask; in xtensa_cpu_process_stack_pc()
32 pc = (pc & 0x3fffffff) | 0x40000000; in xtensa_cpu_process_stack_pc()
35 /* Minus 3 to get PC of previous instruction in xtensa_cpu_process_stack_pc()
38 return pc - 3; in xtensa_cpu_process_stack_pc()
87 * sp to get frame(i-1)'s sp and frame(i-2)'s pc in xtensa_backtrace_get_next_frame()
93 frame->pc = frame->next_pc; in xtensa_backtrace_get_next_frame()
100 /* Return true if both sp and pc of frame(i-1) are sane, in xtensa_backtrace_get_next_frame()
105 xtensa_cpu_process_stack_pc(frame->pc))); in xtensa_backtrace_get_next_frame()
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Ddebug_helpers_asm.S23 /* a2, a3, a4 should be out arguments for i PC, i SP, i-1 PC respectively.
28 /* Load i PC in a7 */
30 /* Store value of i PC in a2 */
32 /* Load value for (i-1) PC, which return address of i into a7 */
34 /* Store value of (i-1) PC in a4 */
Dvector_handlers.c223 void *pc; in print_fatal_exception() local
249 pc = (void *)bsa->pc; in print_fatal_exception()
251 LOG_ERR(" ** PC %p VADDR %p", pc, (void *)vaddr); in print_fatal_exception()
352 void *pc, *print_stack = (void *)interrupted_stack; in xtensa_excint1_c() local
380 LOG_ERR(" ** SYSCALL PS %p PC %p", in xtensa_excint1_c()
381 (void *)bsa->ps, (void *)bsa->pc); in xtensa_excint1_c()
384 /* Xtensa exceptions don't automatically advance PC, in xtensa_excint1_c()
388 bsa->pc += 3; in xtensa_excint1_c()
400 pc = (void *)bsa->pc; in xtensa_excint1_c()
419 if (pc == (void *)&xtensa_arch_except_epc) { in xtensa_excint1_c()
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/Zephyr-latest/arch/xtensa/include/
Dxtensa_backtrace.h28 * (i.e. the PC and SP). This structure is used iteratively with the
30 * within a single stack. The next_pc represents the PC of the current
38 uint32_t pc; /* PC of the current frame */ member
40 uint32_t next_pc; /* PC of the current frame's caller */
50 * - Return PC and SP of function A (i.e. start of the stack's backtrace)
51 * - Return PC of function B (i.e. next_pc)
55 * @param[out] pc PC of the first frame in the backtrace
57 * @param[out] next_pc PC of the first frame's caller
60 void xtensa_backtrace_get_start(uint32_t *pc,
74 * - Frame structure updated with SP and PC of frame(i-1).
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/Zephyr-latest/include/zephyr/dt-bindings/dai/
Desai.h12 * the bit position from PCRC/PRRC's PC/PDC associated
32 * PDC = 0, PC = 0 => DISCONNECTED (0)
33 * PDC = 0, PC = 1 => GPIO INPUT (1)
34 * PDC = 1, PC = 0 => GPIO OUTPUT (2)
35 * PDC = 1, PC = 1 => ESAI (3)
/Zephyr-latest/arch/x86/zefi/
Dprintf.h26 static void pc(struct _pfr *r, int c) in pc() function
41 pc(r, '-'); in prdec()
58 pc(r, digs[i]); in prdec()
76 pc(r, *f); in vpf()
100 pc(r, '%'); in vpf()
103 pc(r, va_arg(ap, int)); in vpf()
109 pc(r, *s); in vpf()
115 pc(r, '0'); in vpf()
116 pc(r, 'x'); /* fall through... */ in vpf()
127 pc(r, "0123456789abcdef"[d]); in vpf()
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/Zephyr-latest/arch/sparc/core/
Dfatal.c29 * pc: 4000a1f4 npc: 4000a1f8
31 * pc sp
44 * wim, y, pc and npc are the values before the trap was taken.
49 * The "#i pc sp" rows is the stack backtrace. All register
51 * is the trapping pc and sp (o6).
57 * at is typically the tt, pc and sp (o6). You can lookup the pc
168 LOG_ERR(" pc: %08x npc: %08x", esf->pc, esf->npc); in print_special_registers()
176 LOG_ERR(" pc sp"); in print_backtrace()
177 LOG_ERR(" #0 %08x %08x", esf->pc, (unsigned int) s); in print_backtrace()
179 const uint32_t pc = s->in[7]; in print_backtrace() local
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/Zephyr-latest/samples/boards/st/bluetooth/interactive_gui/
DREADME.rst11 Expose the Bluetooth network coprocessor via UART to a PC to be used
13 and it passes the data between the host (PC) and controller.
19 * `BlueNRG GUI`_ application installed on your PC
/Zephyr-latest/dts/bindings/dai/
Dnxp,dai-esai.yaml62 1) DISCONNECTED (PDC[i] = 0, PC[i] = 0)
63 2) GPIO input (PDC[i] = 0, PC[i] = 1)
64 3) GPIO output (PDC[i] = 1, PC[i] = 0)
65 4) ESAI (PDC[i] = 1, PC[i] = 1)
/Zephyr-latest/arch/arm/core/
Dgdbstub.c28 unsigned int instr = sys_read32(ctx.registers[PC]); in is_bkpt()
69 ctx.registers[PC] = esf->basic.pc; in z_gdb_entry()
86 esf->basic.pc = ctx.registers[PC]; in z_gdb_entry()
94 esf->basic.pc += 0x4; in z_gdb_entry()
119 uint32_t reg_val = ctx.registers[PC]; in arch_gdb_step()
120 /* set BVR (Breakpoint value register) to PC, make sure it is word aligned */ in arch_gdb_step()
/Zephyr-latest/tests/drivers/can/host/
DREADME.rst10 host PC (running :ref:`Twister <twister_script>`) and a device under test (DUT) running Zephyr.
17 * The python-can library installed on the host PC.
18 * A CAN fixture creating a CAN bus between the host PC and the DUT.
52 On the host PC, a virtual SocketCAN interface needs to be created and brought up before running the
86 Running the test suite on hardware requires a physical CAN adapter connected to the host PC. The CAN
/Zephyr-latest/arch/arm/core/cortex_m/
Dcoredump.c22 uint32_t pc; member
72 arch_blk.r.pc = esf->basic.pc; in arch_coredump_info_dump()
/Zephyr-latest/boards/qemu/x86/
DKconfig.defconfig68 # QEMU presents a PC-compatible machine
90 # QEMU presents a PC-compatible machine
/Zephyr-latest/samples/arch/mpu/mpu_test/
DREADME.rst58 <err> os: Faulting instruction address (r15/pc): 0x000003c8
74 <err> os: Faulting instruction address (r15/pc): 0x000003b2
88 <err> os: Faulting instruction address (r15/pc): 0x20000000
116 <err> os: Faulting instruction address (r15/pc): 0x08000486
129 <err> os: Faulting instruction address (r15/pc): 0x0800046a
/Zephyr-latest/cmake/toolchain/oneApi/
Dgeneric.cmake22 set(triple x86_64-pc-none-elf)
24 set(triple i686-pc-none-elf)
/Zephyr-latest/tests/arch/arm/arm_interrupt/
DREADME.txt64 E: Faulting instruction address (r15/pc): 0x00000f34
78 E: Faulting instruction address (r15/pc): 0x000009a6
87 E: Faulting instruction address (r15/pc): 0x000009c4
99 E: Faulting instruction address (r15/pc): 0x0000cab0
111 E: Faulting instruction address (r15/pc): 0x0000cab0
122 E: Faulting instruction address (r15/pc): 0xf9cfef45
135 E: Faulting instruction address (r15/pc): 0x0000bec0
/Zephyr-latest/boards/firefly/roc_rk3568_pc/
Droc_rk3568_pc.yaml2 name: Rockchip ROC RK3568 PC
Dboard.yml3 full_name: ROC-RK3568-PC (Quad-core Cortex-A55)
Droc_rk3568_pc_rk3568_smp.yaml2 name: Rockchip ROC RK3568 PC SMP
/Zephyr-latest/arch/riscv/core/
Dcoredump.c37 uint64_t pc; member
60 uint32_t pc;
109 arch_blk.r.pc = esf->mepc; in arch_coredump_info_dump()
/Zephyr-latest/scripts/coredump/gdbstubs/arch/
Dxtensa.py39 # the SDK's GDB assigns PC the index 0, while XCC's GDB assigns
278 PC = 0 variable in GdbRegDef_Sample_Controller.RegNum
312 PC = 0 variable in GdbRegDef_ESP32.RegNum
345 PC = 0 variable in GdbRegDef_ESP32S2.RegNum
374 PC = 0 variable in GdbRegDef_ESP32S3.RegNum
415 PC = 0 variable in GdbRegDef_Intel_Adsp_CAVS_Zephyr.RegNum
455 PC = 32 variable in GdbRegDef_Intel_Adsp_CAVS_XCC.RegNum
490 PC = 0 variable in GdbRegDef_DC233C.RegNum
/Zephyr-latest/samples/net/sockets/echo_client/
DREADME.rst189 - Build ``echo-server`` for HOST PC (x86_64)
234 - Install the OTBR (OpenThread Border Router) docker container on your HOST PC (x86_64)
240 Linux PC
262 …:/64`` are the IPv6 addresses - On-Mesh - which allow accessing the OT devices) on HOST PC (x86_64)
296 On the HOST PC's webbrowser: http://localhost:8080/
321 In the HOST PC www webpage interface please:
331 This one can be accessed from HOST's PC network (via e.g.
334 Start ``echo-server`` on HOST PC (x86-64)
/Zephyr-latest/cmake/toolchain/llvm/
Dtarget.cmake32 set(triple x86_64-pc-none-elf)
34 set(triple i686-pc-none-elf)

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