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/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/source/
Dgd32l23x_syscfg.c99 \arg SYSCFG_PA11_PA12_REMAP: PA11 PA12 remap
113 \arg SYSCFG_PA11_PA12_REMAP: PA11 PA12 remap
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/pinconfigs/
Dgd32vf103xx.yml417 PA11:
627 pins: [PA11, null, PB8, PD0]
669 pins: [PA11, PA11, null, PE14]
DREADME.md109 # Configuration for CAN0_RX signal. It can be remapped to PA11 (no remap),
112 pins: [PA11, PB8, None, PD0]
Dgd32f403xx.yml518 PA11:
824 pins: [PA11, null, PB8, PD0]
868 pins: [PA11, PA11, null, PE14]
Dgd32e507xx.yml735 PA11:
1041 pins: [PA11, null, PB8, PD0]
1105 pins: [PA11, PA11, null, PE14]
Dgd32e103xx.yml484 PA11:
732 pins: [PA11, PA11, null, PE14]
Dgd32f350xx.yml204 PA11:
Dgd32a503xx.yml127 PA11:
Dgd32f405xx.yml152 PA11:
Dgd32l233xx.yml174 PA11:
Dgd32f407xx.yml163 PA11:
Dgd32f450xx.yml167 PA11:
Dgd32f470xx.yml167 PA11:
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32l23x/standard_peripheral/include/
Dgd32l23x_syscfg.h53 #define SYSCFG_CFG0_PA11_PA12_RMP BIT(4) /*!< PA11 a…
102 #define SYSCFG_PA11_PA12_REMAP SYSCFG_CFG0_PA11_PA12_RMP /*!< PA11 P…
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/source/
Dgd32a50x_syscfg.c114 \arg SYSCFG_PA9_PA12_REMAP: PA9/PA12 pins are mapping on PA10/PA11 pins
128 \arg SYSCFG_PA9_PA12_REMAP: PA9/PA12 pins are mapping on PA10/PA11 pins
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/source/
Dgd32e50x_gpio.c429 \arg AFIO_PA11_USART5_CFG: configure PA11 alternate function to USART5
430 \arg AFIO_PA11_SHRTIMER_CFG: configure PA11 alternate function to SHRTIMER
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32e50x/standard_peripheral/include/
Dgd32e50x_gpio.h356 #define AFIO_PCFA_PA11_AFCFG BITS(22, 23) /*!< PA11 AF function configuration bi…
567 …gval) (BITS(22, 23) & ((uint32_t)(regval) << 22)) /*!< PA11 AFCFG */
610 …32_t)0x00360000U | (PCFA_PA11_AFCFG(1) >> 16)) /*!< configure PA11 alternate function …
611 …32_t)0x00360000U | (PCFA_PA11_AFCFG(2) >> 16)) /*!< configure PA11 alternate function …
/hal_gigadevice-3.7.0-3.6.0-3.5.0-3.4.0/gd32a50x/standard_peripheral/include/
Dgd32a50x_syscfg.h142 … SYSCFG_CFG0_PA9_PA12_RMP /*!< PA9/PA12 pins are mapping on PA10/PA11 pins */