| /Zephyr-Core-3.6.0/scripts/kconfig/ |
| D | hardened.csv | 1 BOOT_BANNER,n
4 BT_CONN_DISABLE_SECURITY,n
5 BT_DEBUG_KEYS,n
6 BT_DEBUG_SMP,n
7 BT_FIXED_PASSKEY,n
8 BT_LOG_SNIFFER_INFO,n
9 BT_OOB_DATA_FIXED,n
11 BT_STORE_DEBUG_KEYS,n
12 BT_TESTING,n
13 BT_USE_DEBUG_KEYS,n
[all …]
|
| /Zephyr-Core-3.6.0/tests/kernel/fpu_sharing/generic/src/ |
| D | float_regs_riscv_gcc.h | 51 "mv t0, %0\n" in _load_all_float_registers()
52 "mv t1, %1\n" in _load_all_float_registers()
53 RV_FPREG_LOAD "f0, 0(t0)\n" in _load_all_float_registers()
54 "add t0, t0, t1\n" in _load_all_float_registers()
55 RV_FPREG_LOAD "f1, 0(t0)\n" in _load_all_float_registers()
56 "add t0, t0, t1\n" in _load_all_float_registers()
57 RV_FPREG_LOAD "f2, 0(t0)\n" in _load_all_float_registers()
58 "add t0, t0, t1\n" in _load_all_float_registers()
59 RV_FPREG_LOAD "f3, 0(t0)\n" in _load_all_float_registers()
60 "add t0, t0, t1\n" in _load_all_float_registers()
[all …]
|
| D | float_regs_x86_gcc.h | 42 "movdqu 0(%0), %%xmm0\n\t;" in _load_all_float_registers()
43 "movdqu 16(%0), %%xmm1\n\t;" in _load_all_float_registers()
44 "movdqu 32(%0), %%xmm2\n\t;" in _load_all_float_registers()
45 "movdqu 48(%0), %%xmm3\n\t;" in _load_all_float_registers()
46 "movdqu 64(%0), %%xmm4\n\t;" in _load_all_float_registers()
47 "movdqu 80(%0), %%xmm5\n\t;" in _load_all_float_registers()
48 "movdqu 96(%0), %%xmm6\n\t;" in _load_all_float_registers()
49 "movdqu 112(%0), %%xmm7\n\t;" in _load_all_float_registers()
51 "fldt 128(%0)\n\t;" in _load_all_float_registers()
52 "fldt 138(%0)\n\t;" in _load_all_float_registers()
[all …]
|
| D | float_regs_sparc.h | 16 "ldd [%0 + 0x00], %%f0\n" in _load_all_float_registers()
17 "ldd [%0 + 0x08], %%f2\n" in _load_all_float_registers()
18 "ldd [%0 + 0x10], %%f4\n" in _load_all_float_registers()
19 "ldd [%0 + 0x18], %%f6\n" in _load_all_float_registers()
20 "ldd [%0 + 0x20], %%f8\n" in _load_all_float_registers()
21 "ldd [%0 + 0x28], %%f10\n" in _load_all_float_registers()
22 "ldd [%0 + 0x30], %%f12\n" in _load_all_float_registers()
23 "ldd [%0 + 0x38], %%f14\n" in _load_all_float_registers()
24 "ldd [%0 + 0x40], %%f16\n" in _load_all_float_registers()
25 "ldd [%0 + 0x48], %%f18\n" in _load_all_float_registers()
[all …]
|
| /Zephyr-Core-3.6.0/tests/bluetooth/init/ |
| D | prj_ctlr_tiny.conf | 5 CONFIG_BT_CTLR_CONN_PARAM_REQ=n
6 CONFIG_BT_CTLR_EXT_REJ_IND=n
7 CONFIG_BT_CTLR_PER_INIT_FEAT_XCHG=n
8 CONFIG_BT_CTLR_LE_PING=n
9 CONFIG_BT_CTLR_PRIVACY=n
10 CONFIG_BT_CTLR_EXT_SCAN_FP=n
11 CONFIG_BT_DATA_LEN_UPDATE=n
12 CONFIG_BT_PHY_UPDATE=n
13 CONFIG_BT_CTLR_CHAN_SEL_2=n
14 CONFIG_BT_CTLR_MIN_USED_CHAN=n
[all …]
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| D | prj_ctlr_4_0.conf | 5 CONFIG_BT_CTLR_CONN_PARAM_REQ=n
6 CONFIG_BT_CTLR_LE_PING=n
7 CONFIG_BT_CTLR_PRIVACY=n
8 CONFIG_BT_CTLR_EXT_SCAN_FP=n
9 CONFIG_BT_DATA_LEN_UPDATE=n
10 CONFIG_BT_PHY_UPDATE=n
11 CONFIG_BT_CTLR_CHAN_SEL_2=n
12 CONFIG_BT_CTLR_MIN_USED_CHAN=n
13 CONFIG_BT_CTLR_ADV_EXT=n
20 CONFIG_BT_CTLR_RADIO_ENABLE_FAST=n
[all …]
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| D | prj_ctlr_4_0_dbg.conf | 5 CONFIG_BT_CTLR_CONN_PARAM_REQ=n
6 CONFIG_BT_CTLR_LE_PING=n
8 CONFIG_BT_CTLR_EXT_SCAN_FP=n
9 CONFIG_BT_DATA_LEN_UPDATE=n
10 CONFIG_BT_PHY_UPDATE=n
11 CONFIG_BT_CTLR_CHAN_SEL_2=n
12 CONFIG_BT_CTLR_MIN_USED_CHAN=n
13 CONFIG_BT_CTLR_ADV_EXT=n
22 CONFIG_BT_CTLR_RADIO_ENABLE_FAST=n
24 CONFIG_BT_CTLR_CONN_RSSI=n
[all …]
|
| /Zephyr-Core-3.6.0/samples/net/sockets/big_http_download/src/ |
| D | isrgrootx1.pem | 1 "-----BEGIN CERTIFICATE-----\n"
2 "MIIFazCCA1OgAwIBAgIRAIIQz7DSQONZRGPgu2OCiwAwDQYJKoZIhvcNAQELBQAw\n"
3 "TzELMAkGA1UEBhMCVVMxKTAnBgNVBAoTIEludGVybmV0IFNlY3VyaXR5IFJlc2Vh\n"
4 "cmNoIEdyb3VwMRUwEwYDVQQDEwxJU1JHIFJvb3QgWDEwHhcNMTUwNjA0MTEwNDM4\n"
5 "WhcNMzUwNjA0MTEwNDM4WjBPMQswCQYDVQQGEwJVUzEpMCcGA1UEChMgSW50ZXJu\n"
6 "ZXQgU2VjdXJpdHkgUmVzZWFyY2ggR3JvdXAxFTATBgNVBAMTDElTUkcgUm9vdCBY\n"
7 "MTCCAiIwDQYJKoZIhvcNAQEBBQADggIPADCCAgoCggIBAK3oJHP0FDfzm54rVygc\n"
8 "h77ct984kIxuPOZXoHj3dcKi/vVqbvYATyjb3miGbESTtrFj/RQSa78f0uoxmyF+\n"
9 "0TM8ukj13Xnfs7j/EvEhmkvBioZxaUpmZmyPfjxwv60pIgbz5MDmgK7iS4+3mX6U\n"
10 "A5/TR5d8mUgjU+g4rk8Kb4Mu0UlXjIB0ttov0DiNewNwIRt18jA8+o+u3dpjq+sW\n"
[all …]
|
| D | DigiCertGlobalRootG2.crt.pem | 1 "-----BEGIN CERTIFICATE-----\n"
2 "MIIDjjCCAnagAwIBAgIQAzrx5qcRqaC7KGSxHQn65TANBgkqhkiG9w0BAQsFADBh\n"
3 "MQswCQYDVQQGEwJVUzEVMBMGA1UEChMMRGlnaUNlcnQgSW5jMRkwFwYDVQQLExB3\n"
4 "d3cuZGlnaWNlcnQuY29tMSAwHgYDVQQDExdEaWdpQ2VydCBHbG9iYWwgUm9vdCBH\n"
5 "MjAeFw0xMzA4MDExMjAwMDBaFw0zODAxMTUxMjAwMDBaMGExCzAJBgNVBAYTAlVT\n"
6 "MRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5j\n"
7 "b20xIDAeBgNVBAMTF0RpZ2lDZXJ0IEdsb2JhbCBSb290IEcyMIIBIjANBgkqhkiG\n"
8 "9w0BAQEFAAOCAQ8AMIIBCgKCAQEAuzfNNNx7a8myaJCtSnX/RrohCgiN9RlUyfuI\n"
9 "2/Ou8jqJkTx65qsGGmvPrC3oXgkkRLpimn7Wo6h+4FR1IAWsULecYxpsMNzaHxmx\n"
10 "1x7e/dfgy5SDN67sH0NO3Xss0r0upS/kqbitOtSZpLYl6ZtrAGCSYP9PIUkY92eQ\n"
[all …]
|
| /Zephyr-Core-3.6.0/scripts/utils/ |
| D | gen_util_macros.py | 24 file.write("/**\n")
25 file.write(" * @cond INTERNAL_HIDDEN\n")
26 file.write(" */\n")
30 file.write("/**\n")
31 file.write(" * INTERNAL_HIDDEN @endcond\n")
32 file.write(" */\n")
38 file.write("\n")
39 file.write("#ifndef ZEPHYR_INCLUDE_SYS_UTIL_LOOPS_H_\n")
40 ….write("#error \"This header should not be used directly, please include util_loops.h instead\"\n")
41 file.write("#endif /* ZEPHYR_INCLUDE_SYS_UTIL_LOOPS_H_ */\n")
[all …]
|
| /Zephyr-Core-3.6.0/samples/basic/minimal/ |
| D | common.conf | 2 CONFIG_I2C=n
3 CONFIG_WATCHDOG=n
4 CONFIG_GPIO=n
5 CONFIG_PINCTRL=n
6 CONFIG_SPI=n
7 CONFIG_SERIAL=n
8 CONFIG_FLASH=n
11 CONFIG_PM=n
14 CONFIG_DYNAMIC_INTERRUPTS=n
15 CONFIG_IRQ_OFFLOAD=n
[all …]
|
| /Zephyr-Core-3.6.0/samples/net/cloud/mqtt_azure/src/ |
| D | digicert.cer | 1 "-----BEGIN CERTIFICATE-----\r\n"
2 "MIIDdzCCAl+gAwIBAgIEAgAAuTANBgkqhkiG9w0BAQUFADBaMQswCQYDVQQGEwJJ\r\n"
3 "RTESMBAGA1UEChMJQmFsdGltb3JlMRMwEQYDVQQLEwpDeWJlclRydXN0MSIwIAYD\r\n"
4 "VQQDExlCYWx0aW1vcmUgQ3liZXJUcnVzdCBSb290MB4XDTAwMDUxMjE4NDYwMFoX\r\n"
5 "DTI1MDUxMjIzNTkwMFowWjELMAkGA1UEBhMCSUUxEjAQBgNVBAoTCUJhbHRpbW9y\r\n"
6 "ZTETMBEGA1UECxMKQ3liZXJUcnVzdDEiMCAGA1UEAxMZQmFsdGltb3JlIEN5YmVy\r\n"
7 "VHJ1c3QgUm9vdDCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAKMEuyKr\r\n"
8 "mD1X6CZymrV51Cni4eiVgLGw41uOKymaZN+hXe2wCQVt2yguzmKiYv60iNoS6zjr\r\n"
9 "IZ3AQSsBUnuId9Mcj8e6uYi1agnnc+gRQKfRzMpijS3ljwumUNKoUMMo6vWrJYeK\r\n"
10 "mpYcqWe4PwzV9/lSEy/CG9VwcPCPwBLKBsua4dnKM3p31vjsufFoREJIE9LAwqSu\r\n"
[all …]
|
| /Zephyr-Core-3.6.0/drivers/memc/ |
| D | memc_nxp_s32_qspi.c | 79 #define QSPI_DATA_CFG(n) \ argument
82 DT_INST_STRING_UPPER_TOKEN(n, data_rate)), \
83 .dataAlign = COND_CODE_1(DT_INST_PROP(n, hold_time_2x), \
88 #define QSPI_ADDR_CFG(n) \ argument
90 .columnAddr = DT_INST_PROP_OR(n, column_space, 0), \
91 .wordAddresable = DT_INST_PROP(n, word_addressable), \
94 #define QSPI_BYTES_SWAP_ADDR(n) \ argument
96 (.byteSwap = DT_INST_PROP(n, byte_swapping),))
98 #define QSPI_SAMPLE_DELAY(n) \ argument
99 COND_CODE_1(DT_INST_PROP(n, sample_delay_half_cycle), \
[all …]
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| /Zephyr-Core-3.6.0/drivers/sensor/qdec_nxp_s32/ |
| D | qdec_nxp_s32.c | 207 #define EMIOS_NXP_S32_MCB_OVERFLOW_CALLBACK(n) \ argument
208 static void qdec##n##_emios_overflow_count_cw_callback(void) \
210 qdec_emios_overflow_count_cw_callback(DEVICE_DT_INST_GET(n)); \
213 static void qdec##n##_emios_overflow_count_ccw_callback(void) \
215 qdec_emios_overflow_count_ccw_callback(DEVICE_DT_INST_GET(n)); \
236 #define LogicInputCfg_Common(n, mux_sel_idx) \ argument
238 .MuxSel = DT_INST_PROP_BY_IDX(n, lcu_mux_sel, mux_sel_idx), \
242 #define LogicInput_Config_Common(n, hw_lc_input_id, logic_input_n_cfg) \ argument
245 .HwInstId = LCU_NXP_S32_GET_INSTANCE(DT_INST_PHANDLE(n, lcu)), \
246 .HwLcInputId = DT_INST_PROP_BY_IDX(n, lcu_input_idx, hw_lc_input_id), \
[all …]
|
| /Zephyr-Core-3.6.0/soc/arm/nuvoton_npcx/npcx7/ |
| D | soc.h | 13 #define NPCX_DEVALT_OFFSET(n) (0x010 + n) argument
14 #define NPCX_PUPD_EN_OFFSET(n) (0x028 + n) argument
15 #define NPCX_LV_GPIO_CTL_OFFSET(n) ((n < 5) ? (0x02a + n) : (0x021 + n)) argument
16 #define NPCX_DEVALT_LK_OFFSET(n) (0x210 + n) argument
19 #define NPCX_WKEDG_OFFSET(n) (0x000 + (n * 2) + ((n < 5) ? 0 : 0x01e)) argument
20 #define NPCX_WKAEDG_OFFSET(n) (0x001 + (n * 2) + ((n < 5) ? 0 : 0x01e)) argument
21 #define NPCX_WKMOD_OFFSET(n) (0x070 + n) argument
22 #define NPCX_WKPND_OFFSET(n) (0x00a + (n * 4) + ((n < 5) ? 0 : 0x010)) argument
23 #define NPCX_WKPCL_OFFSET(n) (0x00c + (n * 4) + ((n < 5) ? 0 : 0x010)) argument
24 #define NPCX_WKEN_OFFSET(n) (0x01e + (n * 2) + ((n < 5) ? 0 : 0x012)) argument
[all …]
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| /Zephyr-Core-3.6.0/samples/bluetooth/peripheral_hr/ |
| D | prj_minimal.conf | 5 CONFIG_BT_DIS_PNP=n
12 CONFIG_I2C=n
13 CONFIG_WATCHDOG=n
14 CONFIG_PINCTRL=n
15 CONFIG_SPI=n
16 CONFIG_GPIO=n
17 CONFIG_SERIAL=n
20 CONFIG_PM=n
23 CONFIG_DYNAMIC_INTERRUPTS=n
24 CONFIG_IRQ_OFFLOAD=n
[all …]
|
| /Zephyr-Core-3.6.0/tests/kernel/common/src/ |
| D | printk.c | 59 char expected_32[] = "22 113 10000 32768 40000 22\n"
60 "p 112 -10000 -32768 -40000 -22\n"
62 "0x1 0x1 0x1 0x1 0x1\n"
63 "0x1 0x1 0x1 0x1\n"
64 "42 42 42 42\n"
65 "-42 -42 -42 -42\n"
66 "42 42 42 42\n"
67 "42 42 42 42\n"
68 "25542abcdef 42\n"
70 "68719476735 -1 18446744073709551615 ffffffffffffffff\n"
[all …]
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| /Zephyr-Core-3.6.0/samples/modules/tflite-micro/magic_wand/src/ |
| D | output_handler.cpp | 24 "WING:\n\r* * *\n\r * * * " in HandleOutput()
25 "*\n\r * * * *\n\r * * * *\n\r * * " in HandleOutput()
26 "* *\n\r * *\n\r"); in HandleOutput()
29 "RING:\n\r *\n\r * *\n\r * *\n\r " in HandleOutput()
30 " * *\n\r * *\n\r * *\n\r " in HandleOutput()
31 " *\n\r"); in HandleOutput()
34 "SLOPE:\n\r *\n\r *\n\r *\n\r *\n\r " in HandleOutput()
35 "*\n\r *\n\r *\n\r * * * * * * * *\n\r"); in HandleOutput()
|
| /Zephyr-Core-3.6.0/soc/arm/nuvoton_npcx/npcx9/ |
| D | soc.h | 13 #define NPCX_DEVALT_OFFSET(n) (0x010 + n) argument
14 #define NPCX_PUPD_EN_OFFSET(n) (0x028 + n) argument
15 #define NPCX_LV_GPIO_CTL_OFFSET(n) ((n < 5) ? (0x02a + n) : (0x021 + n)) argument
16 #define NPCX_DEVALT_LK_OFFSET(n) (0x210 + n) argument
19 #define NPCX_WKEDG_OFFSET(n) (0x000 + (n * 0x010)) argument
20 #define NPCX_WKAEDG_OFFSET(n) (0x001 + (n * 0x010)) argument
21 #define NPCX_WKMOD_OFFSET(n) (0x002 + (n * 0x010)) argument
22 #define NPCX_WKPND_OFFSET(n) (0x003 + (n * 0x010)) argument
23 #define NPCX_WKPCL_OFFSET(n) (0x004 + (n * 0x010)) argument
24 #define NPCX_WKEN_OFFSET(n) (0x005 + (n * 0x010)) argument
[all …]
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| /Zephyr-Core-3.6.0/tests/drivers/uart/uart_mix_fifo_poll/ |
| D | testcase.yaml | 19 - CONFIG_UART_INTERRUPT_DRIVEN=n
20 - CONFIG_UART_ASYNC_API=n
21 - CONFIG_UART_0_ENHANCED_POLL_OUT=n
22 - CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=n
29 - CONFIG_UART_0_ENHANCED_POLL_OUT=n
30 - CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=n
36 - CONFIG_UART_0_INTERRUPT_DRIVEN=n
38 - CONFIG_UART_0_ENHANCED_POLL_OUT=n
39 - CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=n
46 - CONFIG_UART_0_INTERRUPT_DRIVEN=n
[all …]
|
| /Zephyr-Core-3.6.0/tests/misc/print_format/src/ |
| D | main.c | 11 printk("d%" PRId8 "\n", INT8_C(8)); in main()
12 printk("d%" PRId16 "\n", INT16_C(16)); in main()
13 printk("d%" PRId32 "\n", INT32_C(32)); in main()
14 printk("d%" PRId64 "\n", INT64_C(64)); in main()
16 printk("i%" PRIi8 "\n", INT8_C(8)); in main()
17 printk("i%" PRIi16 "\n", INT16_C(16)); in main()
18 printk("i%" PRIi32 "\n", INT32_C(32)); in main()
19 printk("i%" PRIi64 "\n", INT64_C(64)); in main()
21 printk("o%" PRIo8 "\n", INT8_C(8)); in main()
22 printk("o%" PRIo16 "\n", INT16_C(16)); in main()
[all …]
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| /Zephyr-Core-3.6.0/drivers/interrupt_controller/ |
| D | intc_eirq_nxp_s32.c | 130 #define EIRQ_NXP_S32_CALLBACK(line, n) \ argument
131 void nxp_s32_icu_##n##_eirq_line_##line##_callback(void) \
133 eirq_nxp_s32_callback(DEVICE_DT_INST_GET(n), line); \
136 #define EIRQ_NXP_S32_CHANNEL_CONFIG(idx, n) \ argument
139 .digFilterEn = DT_INST_PROP_OR(DT_CHILD(n, line_##idx), filter_enable, 0), \
140 .maxFilterCnt = DT_INST_PROP_OR(DT_CHILD(n, line_##idx), filter_counter, 0), \
144 .Siul2ChannelNotification = nxp_s32_icu_##n##_eirq_line_##idx##_callback, \
148 #define EIRQ_NXP_S32_CHANNELS_CONFIG(n) \ argument
149 static const Siul2_Icu_Ip_ChannelConfigType eirq_##n##_channel_nxp_s32_cfg[] = { \
150 LISTIFY(NXP_S32_NUM_CHANNELS_DEBRACKET, EIRQ_NXP_S32_CHANNEL_CONFIG, (,), n) \
[all …]
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| /Zephyr-Core-3.6.0/soc/arm/nuvoton_npcx/npcx4/ |
| D | soc.h | 13 #define NPCX_DEVALT_OFFSET(n) (0x010 + n) argument
14 #define NPCX_PUPD_EN_OFFSET(n) (0x02b + n) argument
15 #define NPCX_LV_GPIO_CTL_OFFSET(n) (0x150 + n) argument
16 #define NPCX_DEVALT_LK_OFFSET(n) (0x210 + n) argument
19 #define NPCX_WKEDG_OFFSET(n) (0x000 + (n * 0x010)) argument
20 #define NPCX_WKAEDG_OFFSET(n) (0x001 + (n * 0x010)) argument
21 #define NPCX_WKMOD_OFFSET(n) (0x002 + (n * 0x010)) argument
22 #define NPCX_WKPND_OFFSET(n) (0x003 + (n * 0x010)) argument
23 #define NPCX_WKPCL_OFFSET(n) (0x004 + (n * 0x010)) argument
24 #define NPCX_WKEN_OFFSET(n) (0x005 + (n * 0x010)) argument
[all …]
|
| /Zephyr-Core-3.6.0/subsys/tracing/test/ |
| D | tracing_string_format_test.c | 19 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_switched_out()
27 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_switched_in()
32 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_priority_set()
38 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_create()
43 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_start()
48 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_abort()
53 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_suspend()
58 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_resume()
63 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_resume_exit()
68 TRACING_STRING("%s: %p\n", __func__, thread); in sys_trace_k_thread_ready()
[all …]
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| /Zephyr-Core-3.6.0/drivers/mbox/ |
| D | mbox_nxp_s32_mru.c | 128 LOG_WRN("Enabling channel without a registered callback\n"); in nxp_s32_mru_set_enabled()
188 #define MRU_BASE(n) ((RTU_MRU_Type *)DT_INST_REG_ADDR(n)) argument
189 #define MRU_RX_CHANNELS(n) DT_INST_PROP_OR(n, rx_channels, 0) argument
190 #define MRU_MBOX_ADDR(n, ch, mb) \ argument
191 (DT_INST_REG_ADDR(n) + ((ch + 1) * MRU_CHANNEL_OFFSET) + (MRU_MBOX_SIZE * mb))
193 #define MRU_HW_INSTANCE_CHECK(i, n) \ argument
194 ((DT_INST_REG_ADDR(n) == IP_MRU_##i##_BASE) ? i : 0)
196 #define MRU_HW_INSTANCE(n) \ argument
197 LISTIFY(__DEBRACKET RTU_MRU_INSTANCE_COUNT, MRU_HW_INSTANCE_CHECK, (|), n)
199 #define MRU_INIT_IRQ_FUNC(n) \ argument
[all …]
|
