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/Zephyr-Core-3.4.0/drivers/timer/
DKconfig.mips_cp06 bool "MIPS CP0 Timer"
7 depends on MIPS
10 This module implements a kernel device driver for the MIPS CP0 timer.
/Zephyr-Core-3.4.0/tests/subsys/mgmt/mcumgr/os_mgmt_info/
Dtestcase.yaml16 - mips
28 - mips
44 - mips
60 - mips
87 - mips
101 - mips
/Zephyr-Core-3.4.0/arch/mips/
DKconfig9 menu "MIPS Options"
10 depends on MIPS
14 default "mips"
/Zephyr-Core-3.4.0/boards/mips/
Dindex.rst1 .. _boards-mips:
3 MIPS Boards
/Zephyr-Core-3.4.0/soc/mips/qemu_malta/
DKconfig.soc6 bool "MIPS Qemu Malta implementation"
7 select MIPS
Dlinker.ld7 #include <zephyr/arch/mips/linker.ld>
Dvector.S8 #include <mips/regdef.h>
/Zephyr-Core-3.4.0/boards/mips/qemu_malta/
Dqemu_malta.yaml2 name: QEMU emulation for MIPS
5 arch: mips
Dqemu_malta_be.yaml2 name: QEMU emulation for MIPS
5 arch: mips
DKconfig.board8 bool "QEMU emulation for little endian MIPS Malta"
13 bool "QEMU emulation for big endian MIPS Malta"
Dqemu_malta.dts12 model = "Qemu MIPS Malta";
/Zephyr-Core-3.4.0/boards/mips/qemu_malta/doc/
Dindex.rst3 MIPS Malta Emulation (QEMU)
9 This board configuration will use QEMU to emulate the MIPS Malta platform.
11 This configuration provides support for an MIPS 4Kc/24Kc CPU cores and these devices:
20 with an actual MIPS Malta hardware system, or any other hardware system.
49 see target/mips/cp0_timer.c in Qemu source tree for details.
106 https://www.linux-mips.org/wiki/MIPS_Malta
/Zephyr-Core-3.4.0/tests/kernel/usage/thread_runtime_stats/
Dtestcase.yaml9 # mips
13 - mips
/Zephyr-Core-3.4.0/tests/subsys/mgmt/mcumgr/smp_version/
Dtestcase.yaml15 - mips
29 - mips
/Zephyr-Core-3.4.0/tests/subsys/logging/log_syst/
Dtestcase.yaml9 - mips
33 - mips
/Zephyr-Core-3.4.0/include/zephyr/arch/mips/
Darch.h12 #include <zephyr/arch/mips/thread.h>
13 #include <zephyr/arch/mips/exp.h>
21 #include <mips/mipsregs.h>
/Zephyr-Core-3.4.0/arch/mips/core/
Dreset.S9 #include <mips/regdef.h>
10 #include <mips/mipsregs.h>
Dswap.S12 #include <mips/regdef.h>
/Zephyr-Core-3.4.0/arch/mips/include/mips/
Dmipsregs.h4 * Macros for MIPS CP0 registers manipulations
5 * inspired by linux/arch/mips/include/asm/mipsregs.h
/Zephyr-Core-3.4.0/tests/subsys/mgmt/mcumgr/os_mgmt_echo/
Dtestcase.yaml15 - mips
/Zephyr-Core-3.4.0/dts/bindings/interrupt-controller/
Dmti,cpu-intc.yaml5 description: MIPS CPU interrupt controller
/Zephyr-Core-3.4.0/boards/
Dindex.rst20 mips/index.rst
/Zephyr-Core-3.4.0/tests/subsys/logging/log_switch_format/
Dtestcase.yaml8 - mips
/Zephyr-Core-3.4.0/arch/mips/include/
Dkernel_arch_data.h14 * other definitions for the MIPS processor architecture.
Dkernel_arch_func.h14 * other definitions for the MIPS processor architecture.

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