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/Zephyr-latest/doc/services/input/
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/Zephyr-latest/samples/subsys/rtio/sensor_batch_processing/src/
Dmain.c14 #define M (N/2) macro
21 #define PROCESS_TIME ((M - 1) * SAMPLE_PERIOD)
38 int m = 0; in main() local
39 uint8_t *userdata[M] = {0}; in main()
40 uint32_t data_len[M] = {0}; in main()
42 LOG_INF("Submitting %d read requests", M); in main()
43 rtio_submit(&ez_io, M); in main()
49 while (m < M) { in main()
57 LOG_DBG("Consumed completion event %d", m); in main()
63 if (rtio_cqe_get_mempool_buffer(&ez_io, cqe, &userdata[m], &data_len[m])) { in main()
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/Zephyr-latest/modules/trusted-firmware-m/
DKconfig.tfm.partitions1 # Configuration for the partitions in the TF-M Module
16 to be passed to the TF-M build system. Look at 'config_default.cmake'
17 in the trusted-firmware-m repository for details regarding this
19 options are handled by the build system in the trusted-firmware-m
27 to be passed to the TF-M build system. Look at 'config_default.cmake'
28 in the trusted-firmware-m repository for details regarding this
30 options are handled by the build system in the trusted-firmware-m
38 to be passed to the TF-M build system. Look at 'config_default.cmake'
39 in the trusted-firmware-m repository for details regarding this
41 options are handled by the build system in the trusted-firmware-m
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DKconfig.tfm1 # Configuration for the TF-M Module
25 default "${ZEPHYR_BASE}/modules/trusted-firmware-m/nordic/nrf9160" if SOC_NRF9160
26 default "${ZEPHYR_BASE}/modules/trusted-firmware-m/nordic/nrf9120" if SOC_NRF9120
27 default "${ZEPHYR_BASE}/modules/trusted-firmware-m/nordic/nrf5340_cpuapp" if SOC_NRF5340_CPUAPP
33 bool "Build with TF-M as the Secure Execution Environment"
44 additionally generate a TF-M image for the Secure Execution
49 TF-M and Zephyr images, as well as the veneer object file that links
73 prompt "TF-M build profile"
76 The TF-M build profile selection. Can be empty (not set),
78 TF-M configuration options, namely, the IPC model and the
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/Zephyr-latest/samples/tfm_integration/
Dtfm_integration.rst2 :name: TF-M Integration
5 These TF-M integration examples can be used with a supported Armv8-M board, and demonstrate how
6 the TF-M APIs can be used with Zephyr.
16 built, in addition to the TF-M S and Zephyr NS binary images. The S and NS
23 What is Trusted Firmware-M (TF-M)?
26 Trusted Firmware-M (TF-M) is the reference implementation of `Platform Security
29 TF-M provides a highly configurable set of software components to create a
32 Additionally, secure boot in TF-M ensures integrity of run time software and
35 The current TF-M implementation specifically targets TrustZone for ARMv8-M.
37 Trusted Firmware-M source code is available at
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/Zephyr-latest/doc/hardware/pinctrl/images/
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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/
Dlll_chan.c347 uint8_t m; in lll_chan_sel_2_ut() local
351 m = lll_chan_sel_2(0U, chan_id, chan_map_1, chan_map_1_37_used); in lll_chan_sel_2_ut()
352 LL_ASSERT(m == 25U); in lll_chan_sel_2_ut()
354 m = lll_chan_sel_2(1U, chan_id, chan_map_1, chan_map_1_37_used); in lll_chan_sel_2_ut()
355 LL_ASSERT(m == 20U); in lll_chan_sel_2_ut()
357 m = lll_chan_sel_2(2U, chan_id, chan_map_1, chan_map_1_37_used); in lll_chan_sel_2_ut()
358 LL_ASSERT(m == 6U); in lll_chan_sel_2_ut()
360 m = lll_chan_sel_2(3U, chan_id, chan_map_1, chan_map_1_37_used); in lll_chan_sel_2_ut()
361 LL_ASSERT(m == 21U); in lll_chan_sel_2_ut()
364 m = lll_chan_sel_2(6U, chan_id, chan_map_2, chan_map_2_9_used); in lll_chan_sel_2_ut()
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/Zephyr-latest/include/zephyr/dsp/
Dutils.h43 * @param m The number of bits to left shift the input value (0 to 7).
46 #define Z_SHIFT_Q7_TO_F32(src, m) ((float32_t)(((src << m)) / (float32_t)(1U << 7))) argument
52 * @param m The number of bits to left shift the input value (0 to 15).
55 #define Z_SHIFT_Q15_TO_F32(src, m) ((float32_t)((src << m) / (float32_t)(1U << 15))) argument
61 * @param m The number of bits to left shift the input value (0 to 31).
64 #define Z_SHIFT_Q31_TO_F32(src, m) ((float32_t)(((int64_t)src) << m) / (float32_t)(1U << 31)) argument
70 * @param m The number of bits to left shift the input value (0 to 7).
73 #define Z_SHIFT_Q7_TO_F64(src, m) (((float64_t)(src << m)) / (1U << 7)) argument
79 * @param m The number of bits to left shift the input value (0 to 15).
82 #define Z_SHIFT_Q15_TO_F64(src, m) (((float64_t)(src << m)) / (1UL << 15)) argument
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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/
Dticker.c62 static struct mayfly m = {0, 0, &link, NULL, in hal_ticker_instance0_sched() local
65 m.param = instance; in hal_ticker_instance0_sched()
71 &m); in hal_ticker_instance0_sched()
86 static struct mayfly m = {0, 0, &link, NULL, in hal_ticker_instance0_sched() local
89 m.param = instance; in hal_ticker_instance0_sched()
94 &m); in hal_ticker_instance0_sched()
109 static struct mayfly m = {0, 0, &link, NULL, in hal_ticker_instance0_sched() local
112 m.param = instance; in hal_ticker_instance0_sched()
117 &m); in hal_ticker_instance0_sched()
132 static struct mayfly m = {0, 0, &link, NULL, in hal_ticker_instance0_sched() local
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/Zephyr-latest/subsys/bluetooth/controller/ll_sw/openisa/hal/RV32M1/
Dticker.c63 static struct mayfly m = {0, 0, &link, NULL, in hal_ticker_instance0_sched() local
66 m.param = instance; in hal_ticker_instance0_sched()
72 &m); in hal_ticker_instance0_sched()
88 static struct mayfly m = {0, 0, &link, NULL, in hal_ticker_instance0_sched() local
91 m.param = instance; in hal_ticker_instance0_sched()
96 &m); in hal_ticker_instance0_sched()
111 static struct mayfly m = {0, 0, &link, NULL, in hal_ticker_instance0_sched() local
114 m.param = instance; in hal_ticker_instance0_sched()
119 &m); in hal_ticker_instance0_sched()
134 static struct mayfly m = {0, 0, &link, NULL, in hal_ticker_instance0_sched() local
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/Zephyr-latest/arch/arm/core/cortex_m/
DKconfig1 # ARM Cortex-M platform configuration options
113 Trace (DWT) unit specified by the ARMv7-M and above.
115 While ARMv6-M does define a "DWT" unit, this is significantly different
116 from the DWT specified by the ARMv7-M and above in terms of both feature
129 Always present in CPUs that implement the ARMv7-M or
130 ARM8-M Mainline architectures.
139 in CPUs implementing the ARMv7-M or ARMv8-M architectures.
140 Optional in CPUs implementing ARMv6-M, ARMv8-M Baseline
152 can descend. MSPLIM, PSPLIM are always present in ARMv8-M
153 MCUs that implement the ARMv8-M Main Extension (Mainline).
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/Zephyr-latest/include/zephyr/sys/
Dutil_internal.h145 #define MACRO_MC_1(m, a, ...) m(a) argument
146 #define MACRO_MC_2(m, a, ...) UTIL_CAT(m(a), MACRO_MC_1(m, __VA_ARGS__,)) argument
147 #define MACRO_MC_3(m, a, ...) UTIL_CAT(m(a), MACRO_MC_2(m, __VA_ARGS__,)) argument
148 #define MACRO_MC_4(m, a, ...) UTIL_CAT(m(a), MACRO_MC_3(m, __VA_ARGS__,)) argument
149 #define MACRO_MC_5(m, a, ...) UTIL_CAT(m(a), MACRO_MC_4(m, __VA_ARGS__,)) argument
150 #define MACRO_MC_6(m, a, ...) UTIL_CAT(m(a), MACRO_MC_5(m, __VA_ARGS__,)) argument
151 #define MACRO_MC_7(m, a, ...) UTIL_CAT(m(a), MACRO_MC_6(m, __VA_ARGS__,)) argument
152 #define MACRO_MC_8(m, a, ...) UTIL_CAT(m(a), MACRO_MC_7(m, __VA_ARGS__,)) argument
153 #define MACRO_MC_9(m, a, ...) UTIL_CAT(m(a), MACRO_MC_8(m, __VA_ARGS__,)) argument
154 #define MACRO_MC_10(m, a, ...) UTIL_CAT(m(a), MACRO_MC_9(m, __VA_ARGS__,)) argument
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/Zephyr-latest/tests/subsys/lorawan/frag_decoder/src/
Dfrag_encoder.c17 * M: Number of uncoded fragments (original data)
19 * CR: Coding ratio M/N
47 * @param m Total number of uncoded fragments (M)
49 * @param vec Output vector (buffer size must be greater than m)
51 void lorawan_fec_parity_matrix_vector(int m, int n, uint8_t *vec) in lorawan_fec_parity_matrix_vector() argument
55 memset(vec, 0, m); in lorawan_fec_parity_matrix_vector()
61 if (is_power_of_two(m)) { in lorawan_fec_parity_matrix_vector()
62 mm = m + 1; in lorawan_fec_parity_matrix_vector()
64 mm = m; in lorawan_fec_parity_matrix_vector()
69 for (int nb_coeff = 0; nb_coeff < (m / 2); nb_coeff++) { in lorawan_fec_parity_matrix_vector()
[all …]
/Zephyr-latest/lib/posix/options/
Dmutex.c44 static inline size_t posix_mutex_to_offset(struct k_mutex *m) in posix_mutex_to_offset() argument
46 return m - posix_mutex_pool; in posix_mutex_to_offset()
84 struct k_mutex *m; in to_posix_mutex() local
100 m = &posix_mutex_pool[bit]; in to_posix_mutex()
102 err = k_mutex_init(m); in to_posix_mutex()
105 return m; in to_posix_mutex()
114 struct k_mutex *m = NULL; in acquire_mutex() local
118 m = to_posix_mutex(mu); in acquire_mutex()
119 if (m == NULL) { in acquire_mutex()
124 LOG_DBG("Locking mutex %p with timeout %llx", m, timeout.ticks); in acquire_mutex()
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/Zephyr-latest/doc/services/tfm/
Dintegration.rst1 Trusted Firmware-M Integration
4 The Trusted Firmware-M (TF-M) section contains information about the
5 integration between TF-M and Zephyr RTOS. Use this information to help
6 understand how to integrate TF-M with Zephyr for Cortex-M platforms and make
12 TF-M will be built for the secure processing environment along with Zephyr if
16 and all config flags required for TF-M should be set in a board variant with
22 `modules/trusted-firmware-m/Kconfig.tfm <https://github.com/zephyrproject-rtos/zephyr/blob/main/mod…
23 to the board name that TF-M expects for this target, so that it knows which
34 non-secure image, linked with TF-M as an external project, and optionally the
43 the required space for TF-M and the secure bootloader:
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Dtestsuites.rst4 TF-M includes two sets of test suites:
6 * tf-m-tests - Standard TF-M specific regression tests
12 TF-M Regression Tests
20 application (TF-M).
27 being followed by the secure application, TF-M being an implementation of
37 your specific board, RTOS (Zephyr here), and PSA implementation (TF-M in this
41 changes to TF-M, such as enabling a new TF-M board target, or making changes
42 to the core TF-M module(s). They should generally be run as a coherence check
/Zephyr-latest/subsys/bluetooth/crypto/
Dbt_crypto.c22 uint8_t m[65]; in bt_crypto_f4() local
30 * U, V and Z are concatenated and used as input m to the function in bt_crypto_f4()
38 sys_memcpy_swap(m, u, 32); in bt_crypto_f4()
39 sys_memcpy_swap(m + 32, v, 32); in bt_crypto_f4()
40 m[64] = z; in bt_crypto_f4()
44 err = bt_crypto_aes_cmac(xs, m, sizeof(m), res); in bt_crypto_f4()
61 uint8_t m[53] = {0x00, /* counter */ in bt_crypto_f5() local
86 sys_memcpy_swap(m + 5, n1, 16); in bt_crypto_f5()
87 sys_memcpy_swap(m + 21, n2, 16); in bt_crypto_f5()
88 m[37] = a1->type; in bt_crypto_f5()
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/Zephyr-latest/samples/sensor/accel_trig/
DREADME.rst35 fxos8700@1d [m/s^2]: ( -0.153229, -0.057461, 9.931148)
36 fxos8700@1d [m/s^2]: ( -0.153229, -0.057461, 9.931148)
37 fxos8700@1d [m/s^2]: ( -0.143653, -0.057461, 9.921571)
38 fxos8700@1d [m/s^2]: ( -0.153229, -0.067038, 9.931148)
39 fxos8700@1d [m/s^2]: ( -0.143653, -0.067038, 9.921571)
40 fxos8700@1d [m/s^2]: ( -0.134076, -0.047885, 9.931148)
41 fxos8700@1d [m/s^2]: ( -0.105345, -0.038308, 9.940725)
42 fxos8700@1d [m/s^2]: ( -0.105345, -0.019154, 9.931148)
43 fxos8700@1d [m/s^2]: ( -0.105345, -0.028731, 9.921571)
44 fxos8700@1d [m/s^2]: ( -0.095769, -0.028731, 9.931148)
[all …]
/Zephyr-latest/scripts/utils/
Dmigrate_sys_init.py32 m = re.match(r"^SYS_INIT\(([A-Za-z0-9_]+),.*", line)
33 if m:
34 sys_inits.append(m.group(1))
37 m = re.match(r"^SYS_INIT_NAMED\([A-Za-z0-9_]+,\s?([A-Za-z0-9_]+).*", line)
38 if m:
39 sys_inits.append(m.group(1))
50 m = re.match(
56 if m:
57 b, sys_init, arg, e = m.groups()
61 m = re.match(r"^\s?ARG_UNUSED\(" + arg + r"\);.*$", line)
[all …]
/Zephyr-latest/tests/crypto/tinycrypt/src/
Dsha256.c66 const char *m = "abc"; in ZTEST() local
71 tc_sha256_update(&s, (const uint8_t *)m, strlen(m)); in ZTEST()
95 const char *m = in ZTEST() local
101 tc_sha256_update(&s, (const uint8_t *)m, strlen(m)); in ZTEST()
123 const uint8_t m[1] = { 0xbd }; in ZTEST() local
128 tc_sha256_update(&s, m, sizeof(m)); in ZTEST()
151 const uint8_t m[4] = { 0xc9, 0x8c, 0x8e, 0x55 }; in ZTEST() local
156 tc_sha256_update(&s, m, sizeof(m)); in ZTEST()
179 uint8_t m[55]; in ZTEST() local
183 (void)memset(m, 0x00, sizeof(m)); in ZTEST()
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/Zephyr-latest/cmake/toolchain/llvm/
Dtarget.cmake11 # ARMv8-M mainline is ARMv7-M with additional features from ARMv8-M.
14 # ARMv8-M baseline is ARMv6-M with additional features from ARMv8-M.
17 # ARMV7_M_ARMV8_M_MAINLINE means that ARMv7-M or backward compatible ARMv8-M
21 # ARMV6_M_ARMV8_M_BASELINE means that ARMv6-M or ARMv8-M supporting the

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