/Zephyr-Core-3.5.0/dts/bindings/usb/ |
D | usb-controller.yaml | 1 # Copyright (c) 2018, I-SENSE group of ICCS 2 # SPDX-License-Identifier: Apache-2.0 11 maximum-speed: 14 speed. Valid arguments are "super-speed", "high-speed", 15 "full-speed" and "low-speed". If this is not passed 19 - "low-speed" 20 - "full-speed" 21 - "high-speed" 22 - "super-speed" 24 vbus-gpios: [all …]
|
/Zephyr-Core-3.5.0/dts/bindings/pwm/ |
D | espressif,esp32-ledc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 14 pinctrl-0 = <&ledc0_default>; 15 pinctrl-names = "default"; 18 The 'ledc0_default' node state is defined in <board>-pinctrl.dtsi. 25 output-enable; 29 If another GPIO mapping is desired, check if <board>-pinctrl.dtsi already have it defined, 33 https://github.com/zephyrproject-rtos/hal_espressif/tree/zephyr/include/dt-bindings/pinctrl 46 output-enable; 55 pinctrl-0 = <&ledc0_custom>; 56 pinctrl-names = "default"; [all …]
|
/Zephyr-Core-3.5.0/dts/bindings/i2c/ |
D | atmel,sam-i2c-twim.yaml | 1 # Copyright (c) 2020-2023 Gerson Fernando Budke <nandojve@gmail.com> 2 # SPDX-License-Identifier: Apache-2.0 7 The Atmel Two-wire Master Interface (TWIM) interconnects components on a 8 unique two-wire bus, made up of one clock line and one data line with speeds 9 of up to 3.4 Mbit/s, based on a byte-oriented transfer format. The TWIM is 20 std-clk-slew-lim = <0>; 21 std-clk-strength-low = "0.5"; 22 std-data-slew-lim = <0>; 23 std-data-strength-low = "0.5"; 25 hs-clk-slew-lim = <0>; [all …]
|
D | ite,enhance-i2c.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 compatible: "ite,enhance-i2c" 8 include: ite,common-i2c.yaml 11 prescale-scl-low: 14 This option is used to configure the I2C speed prescaler for 15 the SCL low period. When set to >= 1, it will increase the 16 low period of the SCL clock and so reduce the signal frequency. 21 target-enable: 28 target-pio-mode:
|
/Zephyr-Core-3.5.0/dts/bindings/pinctrl/ |
D | st,stm32-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 Based on pincfg-node.yaml binding. 8 Note: `bias-disable` and `drive-push-pull` are default pin configurations. 9 They will be applied in case no `bias-foo` or `driver-bar` properties 12 compatible: "st,stm32-pinctrl" 20 remap-pa11: 25 remap-pa12: 30 remap-pa11-pa12: 35 child-binding: 40 - name: pincfg-node.yaml [all …]
|
D | nuvoton,numaker-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 30 To link pin configurations with a device, use a pinctrl-N property for some 33 #include "board-pinctrl.dtsi" 36 pinctrl-0 = <&uart0_default>; 37 pinctrl-names = "default"; 40 compatible: "nuvoton,numaker-pinctrl" 48 child-binding: 50 child-binding: 54 - name: pincfg-node.yaml 55 property-allowlist: [all …]
|
D | microchip,xec-pinctrl.yaml | 3 # SPDX-License-Identifier: Apache-2.0 7 Based on pincfg-node.yaml binding. 23 pins, such as the 'bias-pull-up' property in group 2. Here is a list of 26 - bias-disable: Disable pull-up/down (default behavior, not required). 27 - bias-pull-down: Enable pull-down resistor. 28 - bias-pull-up: Enable pull-up resistor. 29 - drive-push-pull: Output driver is push-pull (default, not required). 30 - drive-open-drain: Output driver is open-drain. 31 - output-high: Set output state high when pin configured. 32 - output-low: Set output state low when pin configured. [all …]
|
D | st,stm32f1-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 Based on pincfg-node.yaml binding. 8 Note: `bias-disable` and `drive-push-pull` are default pin configurations. 9 They will be applied in case no `bias-foo` or `driver-bar` properties 12 compatible: "st,stm32f1-pinctrl" 20 swj-cfg: 24 - "full" 25 - "no-njtrst" 26 - "jtag-disable" 27 - "disable" [all …]
|
D | gd,gd32-pinctrl-af.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 use this node to route USART0 RX to pin PA10 and enable the pull-up resistor 20 /* You can put this in places like a board-pinctrl.dtsi file in 24 /* include pre-defined combinations for the SoC variant used by the board */ 25 #include <dt-bindings/pinctrl/gd32f450i(g-i-k)xx-pinctrl.h> 39 /* both PA10 and PA12 have pull-up enabled */ 40 bias-pull-up; 55 for the sleep state (used in device low power mode). Note that analog mode 56 is used for low power states because it disconnects the pin pull-up/down 64 pins, such as the 'bias-pull-up' property in group 2. Here is a list of [all …]
|
D | gd,gd32-pinctrl-afio.yaml | 2 # SPDX-License-Identifier: Apache-2.0 7 use this node to route USART0 RX to pin PA10 and enable the pull-up resistor 20 /* You can put this in places like a board-pinctrl.dtsi file in 24 /* include pre-defined combinations for the SoC variant used by the board */ 25 #include <dt-bindings/pinctrl/gd32f403z(k-i-g-e-c-b)xx-pinctrl.h> 39 /* both PA10 and PA12 have pull-up enabled */ 40 bias-pull-up; 55 for the sleep state (used in device low power mode). Note that analog mode 56 is used for low power states because it disconnects the pin pull-up/down 64 pins, such as the 'bias-pull-up' property in group 2. Here is a list of [all …]
|
/Zephyr-Core-3.5.0/dts/bindings/w1/ |
D | maxim,ds2477_85_common.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 # Common Properties for the DS2477 and DS2485 I2C 1-Wire masters: 6 include: [w1-master.yaml, i2c-device.yaml] 9 switching-threshold: 13 - "low" 14 - "medium" 15 - "high" 16 - "off" 18 Default Low-to-High Switching Threshold. 21 low: 0.25 x VCC, no hysteresis [all …]
|
/Zephyr-Core-3.5.0/tests/kernel/fpu_sharing/generic/ |
D | README.txt | 18 -------------------------------------------------------------------------------- 27 -------------------------------------------------------------------------------- 31 Problems caused by out-dated project information can be addressed by 38 # and restore pre-defined configuration info 40 -------------------------------------------------------------------------------- 44 Depending upon the board's speed, the frequency of test output may range from 45 every few seconds to every few minutes. The speed of the test can be controlled 47 will increase the test's speed, but at the expense of the calculation's 52 -------------------------------------------------------------------------------- 56 *** Booting Zephyr OS build zephyr-v2.2.0-845-g8b769de30317 *** [all …]
|
/Zephyr-Core-3.5.0/modules/hal_gigadevice/ |
D | Kconfig | 1 # Copyright (c) 2021 ATL-Electronics 2 # SPDX-License-Identifier: Apache-2.0 24 prompt "High speed external oscillator clock frequency" 30 Define value of high speed crystal oscillator (HXTAL) in Hz 59 Use 32KHz oscillator for low speed internal RC Oscillator 64 Use 40KHz oscillator for low speed internal RC Oscillator 71 Define value of low speed internal RC oscillator (IRC) in Hz 85 Enable GD32 Analog-to-Digital Converter (ADC) HAL module driver 121 Enable GD32 Digital-to-Analog Converter (DAC) HAL module driver 167 Enable GD32 General-purpose and Alternate-Function I/Os [all …]
|
/Zephyr-Core-3.5.0/tests/drivers/uart/uart_pm/boards/ |
D | nrf52840dk_nrf52840.overlay | 1 /* SPDX-License-Identifier: Apache-2.0 */ 15 low-power-enable; 34 low-power-enable; 46 current-speed = <115200>; 48 pinctrl-0 = <&uart1_default_alt>; 49 pinctrl-1 = <&uart1_sleep_alt>; 50 pinctrl-names = "default", "sleep"; 54 compatible = "nordic,nrf-uarte"; 55 current-speed = <115200>; 57 pinctrl-0 = <&uart0_default_alt>; [all …]
|
/Zephyr-Core-3.5.0/tests/drivers/uart/uart_async_api/boards/ |
D | nrf52840dk_nrf52840.overlay | 1 /* SPDX-License-Identifier: Apache-2.0 */ 15 low-power-enable; 34 low-power-enable; 46 current-speed = <115200>; 48 pinctrl-0 = <&uart1_default_alt>; 49 pinctrl-1 = <&uart1_sleep_alt>; 50 pinctrl-names = "default", "sleep"; 54 compatible = "nordic,nrf-uarte"; 55 current-speed = <115200>; 57 pinctrl-0 = <&uart0_default_alt>; [all …]
|
/Zephyr-Core-3.5.0/soc/arm/nuvoton_numaker/m46x/ |
D | soc.c | 4 * SPDX-License-Identifier: Apache-2.0 20 * ------------------- in z_arm_platform_init() 22 * ------------------- in z_arm_platform_init() 37 /* Enable/disable 32.768 kHz low-speed external crystal oscillator (LXT) */ in z_arm_platform_init() 47 /* Enable 12 MHz high-speed internal RC oscillator (HIRC) */ in z_arm_platform_init() 52 /* Enable 10 KHz low-speed internal RC oscillator (LIRC) */ in z_arm_platform_init() 58 /* Enable/disable 48 MHz high-speed internal RC oscillator (HIRC48) */ in z_arm_platform_init() 70 CLK->PCLKDIV = DT_PROP(DT_NODELABEL(scc), clk_pclkdiv); in z_arm_platform_init()
|
/Zephyr-Core-3.5.0/tests/drivers/uart/uart_mix_fifo_poll/boards/ |
D | nrf52840dk_nrf52840.overlay | 1 /* SPDX-License-Identifier: Apache-2.0 */ 15 low-power-enable; 34 low-power-enable; 46 current-speed = <115200>; 48 pinctrl-0 = <&uart1_default_alt>; 49 pinctrl-1 = <&uart1_sleep_alt>; 50 pinctrl-names = "default", "sleep"; 54 compatible = "nordic,nrf-uarte"; 55 current-speed = <115200>; 57 pinctrl-0 = <&uart0_default_alt>; [all …]
|
/Zephyr-Core-3.5.0/dts/bindings/can/ |
D | ti,tcan4x5x.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Texas Instruments TCAN4x5x SPI CAN-FD controller. 12 spi-max-frequency = <18000000>; 13 clock-frequency = <40000000>; 14 device-state-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; 15 device-wake-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; 16 reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; 17 int-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; 18 bosch,mram-cfg = <0x0 15 15 5 5 0 10 10>; 19 sample-point = <875>; [all …]
|
/Zephyr-Core-3.5.0/dts/bindings/clock/ |
D | nuvoton,numaker-scc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 6 compatible: "nuvoton,numaker-scc" 8 include: [clock-controller.yaml, base.yaml] 19 - "untouched" 20 - "enable" 21 - "disable" 26 Enable/disable 32.768 kHz low-speed external crystal oscillator (LXT) 28 - "untouched" 29 - "enable" 30 - "disable" [all …]
|
/Zephyr-Core-3.5.0/dts/bindings/gpio/ |
D | linaro,96b-lscon-1v8.yaml | 2 # SPDX-License-Identifier: Apache-2.0 4 description: Represents GPIO pin nodes exposed on the 96Boards 1.8v low-speed header 6 compatible: "linaro,96b-lscon-1v8" 8 include: [gpio-nexus.yaml, base.yaml]
|
D | linaro,96b-lscon-3v3.yaml | 2 # SPDX-License-Identifier: Apache-2.0 5 Represents GPIO pin nodes exposed on the 96Boards 3.3v low-speed header 7 compatible: "linaro,96b-lscon-3v3" 9 include: [gpio-nexus.yaml, base.yaml]
|
/Zephyr-Core-3.5.0/boards/xtensa/yd_esp32/ |
D | yd_esp32.dts | 2 * SPDX-License-Identifier: Apache-2.0 4 /dts-v1/; 7 #include <zephyr/dt-bindings/led/led.h> 8 #include "yd_esp32-pinctrl.dtsi" 9 #include <zephyr/dt-bindings/input/input-event-codes.h> 12 model = "VCC-GND Studio YD-ESP32"; 16 uart-0 = &uart0; 17 i2c-0 = &i2c0; 20 led-strip = &rgb_led; 24 compatible = "gpio-keys"; [all …]
|
/Zephyr-Core-3.5.0/boards/arm/nrf52840_mdk/doc/ |
D | index.rst | 3 nRF52840-mdk 9 The nRF52840-MDK is a versatile, easy-to-use IoT hardware platform for 14 DAPLink) that provides USB drag-and-drop programming, USB Virtual COM port 15 and CMSIS-DAP interface. 17 The kit contains a Microchip USB 2.0 Hi-Speed hub controller with two downstream 19 The kit also features ultra-low power 64-Mb QSPI FLASH memory, programmable 22 See `nRF52840-mdk website`_ for more information about the development 27 .. target-notes:: 29 .. _nRF52840 website: https://www.nordicsemi.com/Products/Low-power-short-range-wireless/nRF52840 30 .. _nRF52840-mdk website: https://wiki.makerdiary.com/nrf52840-mdk
|
/Zephyr-Core-3.5.0/soc/arm/nxp_imx/rt/ |
D | power_rt10xx.c | 4 * SPDX-License-Identifier: Apache-2.0 28 * normal/full speed mode, low speed mode, and low power mode. 29 * If callbacks are present, the low power subsystem will disable 30 * PLLs for power savings when entering low power states. 34 /* If run callback is set, low power must be as well. */ in imxrt_clock_pm_callbacks_register() 35 __ASSERT_NO_MSG(callbacks && callbacks->clock_set_run && callbacks->clock_set_low_power); in imxrt_clock_pm_callbacks_register() 36 lpm_clock_hooks.clock_set_run = callbacks->clock_set_run; in imxrt_clock_pm_callbacks_register() 37 lpm_clock_hooks.clock_set_low_power = callbacks->clock_set_low_power; in imxrt_clock_pm_callbacks_register() 38 if (callbacks->clock_lpm_init) { in imxrt_clock_pm_callbacks_register() 39 lpm_clock_hooks.clock_lpm_init = callbacks->clock_lpm_init; in imxrt_clock_pm_callbacks_register() [all …]
|
/Zephyr-Core-3.5.0/boards/arm/sam4l_ek/ |
D | sam4l_ek.dts | 3 * SPDX-License-Identifier: Apache-2.0 6 /dts-v1/; 9 #include "sam4l_ek-pinctrl.dtsi" 10 #include <zephyr/dt-bindings/input/input-event-codes.h> 13 model = "Atmel SAM4L-EK Board with an Atmel SAM4LC4C SoC"; 17 i2c-0 = &twim0; 24 zephyr,shell-uart = &usart2; 30 compatible = "gpio-leds"; 38 compatible = "gpio-keys"; 49 clock-frequency = <48000000>; [all …]
|