1# Copyright (c) 2019 Brett Witherspoon 2# SPDX-License-Identifier: Apache-2.0 3 4description: | 5 TI BoosterPack GPIO header 6 7 GPIO pins exposed as BoosterPack headers on TI LaunchPads. 8 9 BoosterPack plug-in modules are available in 20 and 40 pin variants. The 10 20 pin variant has two 10 x 1 pin headers and the 40 pin variant has two 11 10 x 2 pin headers. Both variants are compatible and stackable. 12 13 The pins of the 20 pin variant and the outer row of the 40 pin variant are 14 numbered 1 through 20. The inner rows of the 40 pin variant are numbered 21 15 through 40. The BoosterPack pinout is depicted below: 16 17 1 3.3V 21 5V 40 GPIO 20 GND 18 2 Analog 22 GND 39 GPIO 19 GPIO / SPI CS 19 3 UART RXD 23 Analog 38 GPIO 18 GPIO 20 4 UART TXD 24 Analog 37 GPIO 17 GPIO 21 5 GPIO 25 Analog 36 GPIO 16 RESET 22 6 Analog 26 Analog 35 GPIO 15 SPI MOSI 23 7 SPI CLK 27 Analog 34 GPIO 14 SPI MISO 24 8 GPIO 28 Analog 33 GPIO 13 GPIO / SPI CS 25 9 I2C SCL 29 32 GPIO 12 GPIO / SPI CS 26 10 I2C SDA 30 31 GPIO 11 GPIO 27 28 Additional information about the BoosterPack pinout can be found at 29 http://processors.wiki.ti.com/index.php/BYOB or in the documentation for 30 a TI LaunchPad development kit, 31 32compatible: "ti,boosterpack-header" 33 34include: [gpio-nexus.yaml, base.yaml] 35
