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1 # I2S (Inter-IC Sound) driver configuration options10 bool "Inter-IC Sound (I2S) bus drivers"12 Enable support for the I2S (Inter-IC Sound) hardware bus.
4 This NXP Mailbox driver implements Multi-Channel Inter-Processor Mailbox (MBOX) API5 around NXP Inter-CPU Mailbox peripheral IP block.7 The NXP Inter-CPU Mailbox provides up to thirty-two user defined interrupts.
4 description: Inter VM shared memory based mailbox binding
2 :name: Inter-Processor Communication (IPC)6 Samples that demonstrate :ref:`Inter-Processor Communication (IPC) <ipc_service>` features.
7 bool "Inter-VM shared memory Ethernet driver"14 Enable Inter-VM Shared Memory Ethernet driver.
4 bool "Inter-Processor Mailbox (IPM) drivers"6 Include interrupt-based inter-processor mailboxes55 Inter Processor Interrupt driver for AMD-Xilinx
3 Inter-IC Sound (I2S) Bus9 The I2S (Inter-IC Sound) API provides support for the standard I2S interface
202 Enable STM32Cube Fast-mode Plus Inter-integrated circuit (FMPI2C)208 Enable STM32Cube Extended Fast-mode Plus Inter-integrated circuit267 Enable STM32Cube Inter-integrated circuit (I2C) interface HAL module273 Enable STM32Cube Extended Inter-integrated circuit (I2C) interface HAL279 Enable STM32Cube Inter-IC sound (I2S) HAL module driver284 Enable STM32Cube Extended Inter-IC sound (I2S) HAL module driver289 Enable STM32Cube Improved inter-integrated circuit (I3C) HAL module300 Enable STM32Cube Inter-Processor communication controller (IPCC) HAL708 Enable STM32Cube Inter-integrated circuit (I2C) interface LL module714 Enable STM32Cube Improved inter-integrated circuit (I3C) LL module[all …]
6 bool "Multi-Channel Inter-Processor Mailbox (MBOX) drivers"8 Include multi-channel interrupt-based inter-processor mailboxes
16 bool "Inter-VM shared memory device (ivshmem)"63 bool "Inter-VM shared memory v2 (ivshmem-v2)"
2 name: Inter-VM Shared Memory (ivshmem) Ethernet
4 description: Inter-Core Interrupt Unit (ICI)
6 menu "Inter Processor Communication"
2 :name: Inter-Integrated Circuit (I2C) Bus
2 :name: Inter-Processor Mailbox (IPM)
7 description: Multiendpoint inter core messaging backend in follower role
7 description: Multiendpoint inter core messaging backend in initiator role
4 description: Intel ADSP Inter Processor Communication on Intel SoC
4 description: Inter processor message based on IVSHMEM
4 description: ESP32 soft inter processor message
3 Inter-Processor Mailbox (IPM)
10 * shared memory reserved for the inter-processor communication
