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Searched full:iomuxc_gpr (Results 1 – 5 of 5) sorted by relevance

/Zephyr-latest/drivers/memc/
Dmemc_nxp_flexram.h51 /* iomuxc_gpr must be const (in ROM region) because used in reconfiguring ram */ in memc_flexram_dt_partition()
52 static IOMUXC_GPR_Type *const iomuxc_gpr = in memc_flexram_dt_partition() local
56 iomuxc_gpr->GPR17 = (DT_FOREACH_PROP_ELEM_SEP(FLEXRAM_DT_NODE, flexram_bank_spec, in memc_flexram_dt_partition()
58 iomuxc_gpr->GPR18 = (((DT_FOREACH_PROP_ELEM_SEP(FLEXRAM_DT_NODE, flexram_bank_spec, in memc_flexram_dt_partition()
61 iomuxc_gpr->GPR17 = DT_FOREACH_PROP_ELEM_SEP(FLEXRAM_DT_NODE, flexram_bank_spec, in memc_flexram_dt_partition()
64 iomuxc_gpr->GPR16 |= IOMUXC_GPR_GPR16_FLEXRAM_BANK_CFG_SEL_MASK; in memc_flexram_dt_partition()
/Zephyr-latest/soc/nxp/imxrt/imxrt11xx/
Dsoc.c419 IOMUXC_GPR->GPR4 &= ~IOMUXC_GPR_GPR4_ENET_REF_CLK_DIR(0x01U); in clock_init()
420 IOMUXC_GPR->GPR4 |= IOMUXC_GPR_GPR4_ENET_TX_CLK_SEL(0x1U); in clock_init()
423 IOMUXC_GPR->GPR4 |= in clock_init()
434 IOMUXC_GPR->GPR5 = (IOMUXC_GPR_GPR5_ENET1G_RGMII_EN(0x01U) | in clock_init()
435 (IOMUXC_GPR->GPR5 & ~IOMUXC_GPR_GPR5_ENET1G_TX_CLK_SEL(0x01U))); in clock_init()
437 IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_ENET1G_REF_CLK_DIR(0x01U); in clock_init()
447 IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_ENET1G_REF_CLK_DIR(0x01U); in clock_init()
448 IOMUXC_GPR->GPR5 |= IOMUXC_GPR_GPR5_ENET1G_TX_CLK_SEL(0x1U); in clock_init()
451 IOMUXC_GPR->GPR5 |= (IOMUXC_GPR_GPR5_ENET1G_REF_CLK_DIR(0x01U) | in clock_init()
584 IOMUXC_GPR->GPR16 |= IOMUXC_GPR_GPR16_CM7_FORCE_HCLK_EN_MASK; in clock_init()
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/Zephyr-latest/soc/nxp/imxrt/imxrt10xx/
Dsoc.c232 IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, false); in clock_init()
235 IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET1TxClkOutputDir, true); in clock_init()
242 IOMUXC_EnableMode(IOMUXC_GPR, kIOMUXC_GPR_ENET2TxClkOutputDir | in clock_init()
Dpower.c258 IOMUXC_GPR->GPR1 |= IOMUXC_GPR_GPR1_GINT_MASK; in rt10xx_power_init()
/Zephyr-latest/dts/bindings/pinctrl/
Dnxp,imx-iomuxc.yaml40 Some IOMUXC options require writing to an IOMUXC_GPR register to select