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/Zephyr-Core-3.7.0/dts/bindings/gpio/
Ddigilent,pmod.yaml14 1 IO2 IO6 5
28 1 IO2
/Zephyr-Core-3.7.0/boards/st/stm32h747i_disco/
Dpmod_connector.dtsi14 <1 0 &gpioc 3 0>, /* IO2 */
/Zephyr-Core-3.7.0/boards/st/stm32h735g_disco/
Dpmod_connector.dtsi14 <1 0 &gpiof 7 0>, /* IO2 */
/Zephyr-Core-3.7.0/boards/adi/sdp_k1/
Dadi_sdp_120pin_connector.dtsi72 <1 0 &sdp_k1_120_hdr SDP_120_SPI_MISO 0>, // IO2
88 <1 0 &sdp_k1_120_hdr SDP_120_UART_TX 0>, // IO2
/Zephyr-Core-3.7.0/dts/bindings/qspi/
Dnxp,s32-qspi.yaml125 a-io2-idle-high:
128 Set if the logic level of IO2 signal output of this controller must be
/Zephyr-Core-3.7.0/soc/espressif/common/
DKconfig.spiram218 ESP32 pin "SD_DATA_3" or SPI flash pin "IO2") is not specified in eFuse. The psram only has QPI
/Zephyr-Core-3.7.0/include/zephyr/dt-bindings/pinctrl/
Dnrf-pinctrl.h124 /** QSPI IO2 */
/Zephyr-Core-3.7.0/boards/fanke/fk7b0m1_vbt6/doc/
Dindex.rst112 - QuadSPI NCS/CLK/IO0/IO1/IO2/IO3 : PB6/PB2/PD11/PD12/PE2/PD13 (NOR Flash)
/Zephyr-Core-3.7.0/drivers/pinctrl/
Dpinctrl_nrf.c355 NRF_PSEL_QSPI(reg, IO2) = psel; in pinctrl_configure_pins()
/Zephyr-Core-3.7.0/boards/weact/mini_stm32h743/doc/
Dindex.rst129 - QuadSPI CLK/NCS/IO0/IO1/IO2/IO3 : PB2/PB6/PD11/PD12/PE2/PD13 (NOR Flash memory)
/Zephyr-Core-3.7.0/boards/espressif/esp32_ethernet_kit/doc/
Dindex.rst389 IO2,,,,IO2,
/Zephyr-Core-3.7.0/boards/ezurio/mg100/doc/
Dindex.rst135 IO2 = P0.22
/Zephyr-Core-3.7.0/boards/st/nucleo_f722ze/doc/
Dindex.rst166 - IO2: PE2 (CN10 pin 25)
/Zephyr-Core-3.7.0/scripts/utils/
Dpinctrl_nrf_migrate.py602 "io2": "QSPI_IO2",
/Zephyr-Core-3.7.0/samples/drivers/espi/src/
Dmain.c281 * will act as IO2/IO3. We will write the volatile QE bit for less in spi_saf_init()
/Zephyr-Core-3.7.0/boards/espressif/esp_wrover_kit/doc/
Dindex.rst242 | Camera, LED, Boot | IO0 | IO2 | LED, MicroSD |
/Zephyr-Core-3.7.0/boards/snps/hsdk/doc/
Dindex.rst272 | IO2 | gpio[16] | - | - |
/Zephyr-Core-3.7.0/boards/snps/hsdk4xd/doc/
Dindex.rst269 | IO2 | gpio[16] | - | - |