/Zephyr-latest/include/zephyr/drivers/ |
D | hwspinlock.h | 11 * @brief HW spinlock Interface 12 * @defgroup hwspinlock_interface HW spinlock Interface 29 * @brief Callback API for trying to lock HW spinlock 35 * @brief Callback API to lock HW spinlock 41 * @brief Callback API to unlock HW spinlock 47 * @brief Callback API to get HW spinlock max ID 63 * @brief Try to lock HW spinlock 65 * This function is used for try to lock specific HW spinlock. It should 68 * @param dev HW spinlock device instance. 89 * @brief Lock HW spinlock [all …]
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/Zephyr-latest/drivers/hwspinlock/ |
D | Kconfig | 1 # HW spinlock configuration options 7 bool "HW spinlock Support" 9 Include support for HW spinlock. 14 int "HW spinlock init priority" 17 HW spinlock driver device initialization priority.
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D | Kconfig.sqn | 1 # Sequans HW spinlock configuration 7 bool "Sequans HW spinlock Driver" 11 Enable HW spinlock for SQN 15 int "Sequans HW spinlock relax time" 18 Default HW spinlock relax time in microseconds.
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/Zephyr-latest/soc/native/inf_clock/ |
D | soc.c | 13 * the HW models. 15 * The HW models raising an interrupt will "awake the cpu" by calling 19 * given back to the HW models. 21 * The Zephyr OS+APP code and the HW models are gated by a mutex + 23 * HW models run or vice versa 47 * Both HW and SW threads will use this function to transfer control to the 50 * This is how the idle thread halts the CPU and gets halted until the HW models 51 * raise a new interrupt; and how the HW models awake the CPU, and wait for it 64 * HW models shall call this function to "awake the CPU" 87 * until the CPU is awoken again by the HW models) in posix_halt_cpu() [all …]
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/Zephyr-latest/boards/common/ |
D | mdb-hw.board.cmake | 3 board_set_flasher_ifnset(mdb-hw) 4 board_set_debugger_ifnset(mdb-hw) 5 board_finalize_runner_args(mdb-hw)
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/Zephyr-latest/boards/native/doc/ |
D | bsim_boards_design.rst | 34 .. _Architecture of HW models used for FW development and testing: 43 .. _nRF HW models design documentation: 55 will include some HW models which, to some degree, pretend to be the real 56 embedded HW. 58 These tests are run in workstation, that is, without using real embedded HW. 60 without the need for real HW, and in a deterministic/reproducible fashion. 85 - Integration tests on real HW: Allows testing with the real SW 86 components that may be too dependent on the exact HW particularities, and 89 but at the expense of slower execution, needing the real HW setups, 109 the embedded code, but without any specific HW. In that way, many embedded [all …]
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/Zephyr-latest/boards/native/nrf_bsim/common/ |
D | bstests.h | 24 * This is BEFORE any SW has run, and before the HW has been initialized 28 * test ticker or other HW models. 31 /* It will be called (in the HW models thread) before the CPU is booted, 32 * after the HW models have been initialized. Note that a possible delayed 38 * It will be called (in the HW models thread) when the CPU goes to sleep 42 /* It will be called (in the HW models thread) each time the bst_timer ticks */ 45 * It will be called (in the HW models thread) when the execution is being 50 * It will be called (in SW context) when a HW interrupt is raised. 119 * Interface for the fake HW device (timer) dedicated to the tests
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/Zephyr-latest/scripts/native_simulator/common/src/ |
D | nsi_hw_scheduler.c | 9 * Overall HW models scheduler for the native simulator 24 uint64_t nsi_simu_time; /* The actual time as known by the HW models */ 51 * received, and in each iteration of the hw main loop this variable is 120 * Execute the next scheduled HW event 145 * Function to initialize the HW scheduler 147 * Note that the HW models should register their initialization functions 159 * Function to free any resources allocated by the HW scheduler 161 * Note that the HW models should register their initialization functions
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D | nce.c | 14 * Its mode of operation is that it step-locks the HW 77 * If called from a SW thread, release the HW thread which is blocked in 80 * If called from a HW thread, do the necessary clean up of this nce instance 89 * If we are being called from a HW thread we can cleanup in nce_terminate() 91 * Otherwise (!cpu_halted) we give back control to the HW thread and in nce_terminate() 118 * the HW thread. sleep() is a cancellation point, so it in nce_terminate() 130 * Both HW and SW threads will use this function to transfer control to the 133 * This is how the idle thread halts the CPU and gets halted until the HW models 134 * raise a new interrupt; and how the HW models awake the CPU, and wait for it 150 * completion before continuing (before letting the HW models do in change_cpu_state_and_wait() [all …]
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D | nsi_tasks.h | 32 * or the HW models are initialized 35 * but before the HW models are initialized 37 * * HW_INIT: Will be called during HW models initialization 39 * * PRE_BOOT_3: Will be called after the HW models initialization, right before
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/Zephyr-latest/doc/connectivity/bluetooth/ |
D | bluetooth-dev.rst | 26 .. _bluetooth-hw-setup: 38 #. :ref:`Embedded <bluetooth-hw-setup-embedded>` 39 #. :ref:`External controller <bluetooth-hw-setup-external-ll>` 41 - :ref:`QEMU host <bluetooth-hw-setup-qemu-host>` 42 - :ref:`native_sim host <bluetooth-hw-setup-native-sim-host>` 44 #. :ref:`Simulated nRF5x with BabbleSim <bluetooth-hw-setup-bsim>` 46 .. _bluetooth-hw-setup-embedded: 67 .. _bluetooth-hw-setup-external-ll: 101 .. _bluetooth-hw-setup-qemu-host: 112 .. _bluetooth-hw-setup-native-sim-host: [all …]
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/Zephyr-latest/arch/nios2/ |
D | CMakeLists.txt | 22 zephyr_cc_option(-mno-hw-mul) 28 zephyr_cc_option(-mno-hw-mulx) 34 zephyr_cc_option(-mno-hw-div)
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/Zephyr-latest/dts/arm/xilinx/ |
D | zynqmp.dtsi | 119 hw-rx-buffer-size = <XLNX_GEM_HW_RX_BUFFER_SIZE_8KB>; 120 hw-rx-buffer-offset = <0>; 121 hw-tx-buffer-size-full; 146 hw-rx-buffer-size = <XLNX_GEM_HW_RX_BUFFER_SIZE_8KB>; 147 hw-rx-buffer-offset = <0>; 148 hw-tx-buffer-size-full; 173 hw-rx-buffer-size = <XLNX_GEM_HW_RX_BUFFER_SIZE_8KB>; 174 hw-rx-buffer-offset = <0>; 175 hw-tx-buffer-size-full; 200 hw-rx-buffer-size = <XLNX_GEM_HW_RX_BUFFER_SIZE_8KB>; [all …]
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/Zephyr-latest/drivers/crypto/ |
D | crypto_it8xxx2_sha_v2.c | 105 * via the DLM (Data Local Memory) bus while HW module is computing in it8xxx2_sha256_module_calculation() 114 * HW 64 bytes data calculation ~= 4us; in it8xxx2_sha256_module_calculation() 115 * HW 1024 bytes data calculation ~= 66us. in it8xxx2_sha256_module_calculation() 135 LOG_ERR("HW execute sha256 calculation timeout"); in it8xxx2_sha256_module_calculation() 167 /* HW automatically load 1KB data from DLM */ in it8xxx2_hash_handler() 183 * If fill full 64byte then execute HW calculation. in it8xxx2_hash_handler() 187 /* HW automatically load 64Bytes data from DLM */ in it8xxx2_hash_handler() 213 * If the data index >= 56, it needs to trigger HW to calculate, in it8xxx2_hash_handler() 217 /* HW automatically load 64Bytes data from DLM */ in it8xxx2_hash_handler() 236 /* HW automatically load 64Bytes data from DLM */ in it8xxx2_hash_handler() [all …]
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/Zephyr-latest/boards/native/native_posix/ |
D | hw_models_top.c | 8 * Reduced set of HW models sufficient to run some of the sample apps 27 static uint64_t simu_time; /* The actual time as known by the HW models */ 30 /* List of HW model timers: */ 67 * received, and in each iteration of the hw main loop this variable is 131 * Execute the next scheduled HW event/timer 180 * Function to initialize the HW models 193 * Function to free any resources allocated by the HW models
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/Zephyr-latest/include/zephyr/drivers/dma/ |
D | dma_mcux_lpc.h | 27 /* HW trigger polarity. When this bit is set, the trigger will be active 32 /* HW trigger type. When this bit is set, the trigger will be level triggered. 37 /* HW trigger burst mode. When set, the hardware trigger will cause a burst 44 /* HW trigger burst power. Note that due to the size limit of the dma_slot
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/Zephyr-latest/dts/bindings/timer/ |
D | nxp,gpt-hw-timer.yaml | 4 description: NXP MCUX General-Purpose HW Timer (GPT) 6 compatible: "nxp,gpt-hw-timer"
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/Zephyr-latest/boards/snps/emsdp/ |
D | board.cmake | 4 board_runner_args(mdb-hw "--jtag=digilent") 6 include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)
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/Zephyr-latest/boards/snps/iotdk/ |
D | board.cmake | 4 board_runner_args(mdb-hw "--jtag=digilent") 6 include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)
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/Zephyr-latest/boards/snps/em_starterkit/ |
D | board.cmake | 5 board_runner_args(mdb-hw "--jtag=digilent") 7 include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)
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/Zephyr-latest/boards/snps/hsdk4xd/ |
D | board.cmake | 4 board_runner_args(mdb-hw "--jtag=digilent" "--cores=${CONFIG_MP_MAX_NUM_CPUS}") 6 include(${ZEPHYR_BASE}/boards/common/mdb-hw.board.cmake)
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/Zephyr-latest/scripts/native_simulator/common/src/include/ |
D | nsi_hws_models_if.h | 18 /* Internal structure used to link HW events */ 27 * The HW scheduler will keep track of this event, and call its callback whenever its 30 * (Normally HW models will not care about the event ordering, and will simply set a prio like 100)
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/Zephyr-latest/dts/bindings/serial/ |
D | nordic,nrf-uarte.yaml | 11 UARTE has ENDTX_STOPTX HW short. 16 UARTE has RX frame timeout HW feature.
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/Zephyr-latest/boards/nxp/twr_ke18f/ |
D | Kconfig.defconfig | 12 # The KE1xF has 8 MPU regions, which is not enough for both HW stack protection 13 # and userspace. Only enable HW stack protection if userspace is not enabled.
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/Zephyr-latest/tests/kernel/timer/timer_behavior/pytest/ |
D | conftest.py | 13 parser.addoption('--sys-clock-hw-cycles-per-sec', default=None) 43 if request.config.getoption('--sys-clock-hw-cycles-per-sec'): 44 return int(request.config.getoption('--sys-clock-hw-cycles-per-sec'))
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