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/Zephyr-latest/boards/snps/nsim/arc_classic/
Dnsim_nsim_hs5x_smp_12cores.dts22 compatible = "snps,arcv3-hs";
28 compatible = "snps,arcv3-hs";
34 compatible = "snps,arcv3-hs";
40 compatible = "snps,arcv3-hs";
46 compatible = "snps,arcv3-hs";
52 compatible = "snps,arcv3-hs";
58 compatible = "snps,arcv3-hs";
64 compatible = "snps,arcv3-hs";
70 compatible = "snps,arcv3-hs";
76 compatible = "snps,arcv3-hs";
[all …]
Dnsim_nsim_hs6x_smp_12cores.dts22 compatible = "snps,arcv3-hs";
28 compatible = "snps,arcv3-hs";
34 compatible = "snps,arcv3-hs";
40 compatible = "snps,arcv3-hs";
46 compatible = "snps,arcv3-hs";
52 compatible = "snps,arcv3-hs";
58 compatible = "snps,arcv3-hs";
64 compatible = "snps,arcv3-hs";
70 compatible = "snps,arcv3-hs";
76 compatible = "snps,arcv3-hs";
[all …]
Dnsim_nsim_hs5x_smp.dts22 compatible = "snps,arcv3-hs";
28 compatible = "snps,arcv3-hs";
Dnsim_nsim_hs6x_smp.dts22 compatible = "snps,arcv3-hs";
28 compatible = "snps,arcv3-hs";
Dnsim_nsim_hs.yaml2 name: HS nSIM simulator
Dnsim_nsim_hs_sram.yaml2 name: HS nSIM simulator (SRAM)
Dnsim_nsim_hs_flash_xip.yaml2 name: HS nSIM simulator (FLASH XIP)
Dnsim_nsim_hs_mpuv6.yaml2 name: HS (with MPU v6) nSIM simulator
Dnsim_nsim_hs_smp.yaml2 name: Multi-core HS nSIM simulator
/Zephyr-latest/drivers/crypto/
Dcrypto_mchp_xec_symcr.c300 struct xec_symcr_hash_session *hs = NULL; in xec_symcr_do_hash() local
310 hs = (struct xec_symcr_hash_session *)ctx->drv_sessn_state; in xec_symcr_do_hash()
311 c = &hs->mhctx; in xec_symcr_do_hash()
312 cstate = &hs->mhstate; in xec_symcr_do_hash()
314 if (!hs->open) { in xec_symcr_do_hash()
324 if (!finish && ((hs->blklen + pkt->in_len) < hs->blksz)) { in xec_symcr_do_hash()
325 memcpy(&hs->blockbuf[hs->blklen], pkt->in_buf, pkt->in_len); in xec_symcr_do_hash()
326 hs->blklen += pkt->in_len; in xec_symcr_do_hash()
330 ret = init_rom_hash_context(hs->rom_algo, c); in xec_symcr_do_hash()
344 rem_len = pkt->in_len & (hs->blksz - 1u); in xec_symcr_do_hash()
[all …]
/Zephyr-latest/dts/bindings/i2c/
Datmel,sam-i2c-twim.yaml25 hs-clk-slew-lim = <0>;
26 hs-clk-strength-high = "0.5";
27 hs-clk-strength-low = "0.5";
28 hs-data-slew-lim = <0>;
29 hs-data-strength-low = "0.5";
33 std-<line> configures fast/fast-plus mode speeds and hs-<line> selects the
114 hs-clk-slew-lim:
119 should be adjusted with both hs-clk-strength-high and
120 hs-clk-strength-low to fine tune the TWCK slope.
127 hs-clk-strength-high:
[all …]
/Zephyr-latest/boards/atmel/sam/sam4l_ek/
Dsam4l_ek.dts86 hs-clk-slew-lim = <0>;
87 hs-clk-strength-high = "0.5";
88 hs-clk-strength-low = "0.5";
89 hs-data-slew-lim = <0>;
90 hs-data-strength-low = "0.5";
92 hs-master-code = <0>;
/Zephyr-latest/subsys/usb/device_next/class/
Dusbd_hid_macros.h99 #define HID_IN_EP_INTERVAL(n, hs) \ argument
100 COND_CODE_1(hs, \
105 #define HID_OUT_EP_INTERVAL(n, hs) \ argument
106 COND_CODE_1(hs, \
168 #define HID_OUT_EP_DEFINE(n, hs, alt) \ argument
175 .bInterval = HID_OUT_EP_INTERVAL(n, hs), \
178 #define HID_IN_EP_DEFINE(n, hs, alt) \ argument
185 .bInterval = HID_IN_EP_INTERVAL(n, hs), \
192 #define HID_OUT_EP_DEFINE_OR_ZERO(n, hs, alt) \ argument
194 (HID_OUT_EP_DEFINE(n, hs, alt)), \
/Zephyr-latest/boards/snps/hsdk/
DKconfig.hsdk1 # DesignWare ARC HS Development Kit board configuration
9 The DesignWare ARC HS Development Kit is a ready-to-use platform for
Dboard.yml3 full_name: ARC HS Development Kit
Dhsdk.yaml2 name: HS Development Kit
Dhsdk_arc_hsdk_2cores.yaml2 name: HS Development Kit(2 cores)
/Zephyr-latest/boards/snps/hsdk/support/
Dopenocd-2-cores.cfg6 # SDP has built-in FT2232 chip, which is similar to Digilent HS-1, except that
28 # HS Development Kit SoC.
33 source [find cpu/arc/hs.tcl]
39 # OpenOCD is concerned EM and HS are identical.
Dopenocd.cfg6 # SDP has built-in FT2232 chip, which is similar to Digilent HS-1, except that
28 # HS Development Kit SoC.
33 source [find cpu/arc/hs.tcl]
39 # OpenOCD is concerned EM and HS are identical.
/Zephyr-latest/boards/snps/hsdk4xd/support/
Dopenocd.cfg6 # SDP has built-in FT2232 chip, which is similar to Digilent HS-1, except that
28 # HS Development Kit SoC.
33 source [find cpu/arc/hs.tcl]
39 # OpenOCD is concerned EM and HS are identical.
/Zephyr-latest/soc/snps/nsim/arc_classic/hs/
DKconfig.defconfig6 rsource "Kconfig.defconfig.hs*"
/Zephyr-latest/dts/bindings/mipi-dsi/
Dnxp,mipi-dsi-2l.yaml65 Automatically insert an EoTp short packet when switching from HS to LP mode.
74 noncontinuous-hs-clk:
/Zephyr-latest/boards/qemu/arc/
Dqemu_arc_qemu_arc_hs.yaml2 name: QEMU Emulation for ARC HS
Dqemu_arc_qemu_arc_hs_xip.yaml2 name: QEMU Emulation for ARC HS (XIP)
/Zephyr-latest/dts/bindings/phy/
Dst,stm32-usbphyc.yaml4 description: STM32 USB HS PHY controller

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