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/Zephyr-Core-3.5.0/dts/bindings/gpio/
Dnordic,nrf-gpiote.yaml4 description: NRF5 GPIOTE node
6 compatible: "nordic,nrf-gpiote"
Dnordic,nrf-gpio.yaml21 Pins not included in the mask use GPIOTE channels in the event mode.
/Zephyr-Core-3.5.0/dts/arm/nordic/
Dnrf5340_cpuapp_peripherals_ns.dtsi13 gpiote1: gpiote@4002f000 {
14 compatible = "nordic,nrf-gpiote";
Dnrf91ns.dtsi50 gpiote: gpiote@40031000 { label
51 compatible = "nordic,nrf-gpiote";
Dnrf5340_cpuapp.dtsi79 * so we give it the 'gpiote' label for use when building
82 gpiote: gpiote0: gpiote@5000d000 { label
83 compatible = "nordic,nrf-gpiote";
Dnrf91.dtsi63 gpiote: gpiote@5000d000 { label
64 compatible = "nordic,nrf-gpiote";
Dnrf5340_cpuappns.dtsi70 * it expects to be at the root level, adding a 'gpiote' label
75 gpiote: &gpiote1 {}; label
Dnrf51822.dtsi134 gpiote: gpiote@40006000 { label
135 compatible = "nordic,nrf-gpiote";
Dnrf52805.dtsi135 gpiote: gpiote@40006000 { label
136 compatible = "nordic,nrf-gpiote";
/Zephyr-Core-3.5.0/drivers/pwm/
DKconfig.nrf_sw17 GPIOTE channel and two PPI/DPPI channels and per pin.
19 When used with RTC, it provides up to 3 pins, utilizing one GPIOTE
/Zephyr-Core-3.5.0/samples/boards/nrf/nrfx/
DREADME.rst10 GPIOTE and DPPI/PPI are used as examples of nrfx drivers.
12 The code shows how to initialize the GPIOTE interrupt in Zephyr
19 for the GPIOTE interrupt. Button 1 is configured to create an event when pushed.
/Zephyr-Core-3.5.0/dts/bindings/display/
Dnordic,nrf-led-matrix.yaml63 GPIOs. If not provided, GPIOTE and PPI channels are allocated and
76 In case GPIOTE and PPI channels are used for generating the pixel pulse
79 If GPIOTE and PPI channels are used, the upper limit for the value is
/Zephyr-Core-3.5.0/samples/boards/nrf/nrfx/src/
Dmain.c40 IRQ_CONNECT(DT_IRQN(DT_NODELABEL(gpiote)), in main()
41 DT_IRQ(DT_NODELABEL(gpiote), priority), in main()
44 /* Initialize GPIOTE (the interrupt priority passed as the parameter in main()
/Zephyr-Core-3.5.0/boards/posix/nrf_bsim/
Dnrf5340bsim_nrf5340_cpunet.dts20 /delete-property/ gpiote-0;
38 /delete-node/ gpiote@4100a000;
Dnrf5340bsim_nrf5340_cpuapp.dts44 /delete-property/ gpiote-0;
95 /delete-node/ gpiote@5000d000;
/Zephyr-Core-3.5.0/drivers/display/
DKconfig.nrf_led_matrix18 devicetree, one PWM instance or one or more GPIOTE and PPI channels
/Zephyr-Core-3.5.0/boards/arm/raytac_mdbt53_db_40_nrf5340/
Draytac_mdbt53_db_40_nrf5340_cpunet_common.dts9 &gpiote {
/Zephyr-Core-3.5.0/boards/arm/raytac_mdbt53v_db_40_nrf5340/
Draytac_mdbt53v_db_40_nrf5340_cpunet_common.dts9 &gpiote {
/Zephyr-Core-3.5.0/boards/arm/nrf51_blenano/
Dnrf51_blenano.dts38 &gpiote {
/Zephyr-Core-3.5.0/boards/arm/96b_carbon_nrf51/
D96b_carbon_nrf51.dts28 &gpiote {
/Zephyr-Core-3.5.0/boards/arm/bl5340_dvk/
Dbl5340_dvk_cpunet_common.dtsi9 &gpiote {
/Zephyr-Core-3.5.0/boards/arm/qemu_cortex_m0/
Dqemu_cortex_m0.dts31 &gpiote {
/Zephyr-Core-3.5.0/boards/arm/nrf51_vbluno51/
Dnrf51_vbluno51.dts53 &gpiote {
/Zephyr-Core-3.5.0/modules/hal_nordic/nrfx/
DKconfig.logging28 bool "GPIOTE driver logging"
/Zephyr-Core-3.5.0/boards/arm/nrf52_vbluno52/
Dnrf52_vbluno52.dts56 &gpiote {

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