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/Zephyr-latest/boards/arm/fvp_baser_aemv8r/
Dboard.cmake14 -C cluster0.gicv3.cpuintf-mmap-access-level=2
15 -C cluster0.gicv3.SRE-enable-action-on-mmap=2
16 -C cluster0.gicv3.SRE-EL2-enable-RAO=1
17 -C cluster0.gicv3.extended-interrupt-range-support=1
48 -C cluster0.gicv3.cpuintf-mmap-access-level=2
49 -C cluster0.gicv3.SRE-enable-action-on-mmap=2
50 -C cluster0.gicv3.SRE-EL2-enable-RAO=1
51 -C cluster0.gicv3.extended-interrupt-range-support=1
/Zephyr-latest/tests/kernel/device/
Dtestcase.yaml12 - xenvm/xenvm/gicv3
28 - xenvm/xenvm/gicv3
35 - xenvm/xenvm/gicv3
/Zephyr-latest/boards/xen/xenvm/
Dxenvm_xenvm_gicv3.yaml1 identifier: xenvm/xenvm/gicv3
2 name: ARMv8 Xen Virtual Machine With GICv3
Dboard.yml8 - name: gicv3
/Zephyr-latest/tests/drivers/charger/sbs_charger/
Dtestcase.yaml20 - xenvm/xenvm/gicv3
33 - xenvm/xenvm/gicv3
/Zephyr-latest/tests/drivers/fuel_gauge/sbs_gauge/
Dtestcase.yaml20 - xenvm/xenvm/gicv3
39 - xenvm/xenvm/gicv3
/Zephyr-latest/boards/xen/xenvm/doc/
Dindex.rst16 * GICv2/GICv3
62 - ``xenvm//gicv3`` selects GICv3
106 - if your hardware is based on GICv3:
110 $ west build -b xenvm//gicv3 samples/synchronization
124 When using ``xenvm//gicv3`` configuration, you need to remove the ``gic_version``
/Zephyr-latest/tests/arch/arm64/arm64_gicv3_its/boards/
Dfvp_base_revc_2xaemv8a.conf1 # The GICv3 & ITS drivers allocation needs are:
/Zephyr-latest/boards/arm/fvp_base_revc_2xaemv8a/
DKconfig4 # The GICv3 & ITS drivers allocation needs are:
/Zephyr-latest/dts/bindings/interrupt-controller/
Darm,gic-v3.yaml10 Examples for GICv3 devicetree nodes:
/Zephyr-latest/boards/arm/fvp_base_revc_2xaemv8a/doc/
Dindex.rst15 * GICv3 interrupt controller
30 | GICv3 | on-chip | interrupt controller |
/Zephyr-latest/boards/qemu/kvm_arm64/doc/
Dindex.rst12 * GICv3 interrupt controller
/Zephyr-latest/boards/brcm/bcm958402m2/doc/
Da72.rst27 | GIC-500 | on-chip | GICv3 interrupt controller |
/Zephyr-latest/include/zephyr/arch/arm/cortex_a_r/
Dlib_helpers.h84 * We define them anyway to reuse the GICv3 driver
/Zephyr-latest/boards/intel/socfpga/agilex5_socdk/doc/
Dindex.rst34 | GIC-600 | on-chip | ARM GICv3 interrupt controller |
/Zephyr-latest/boards/arm/fvp_baser_aemv8r/doc/
Daarch32.rst36 | GICv3 | on-chip | interrupt controller |
Daarch64.rst43 | GICv3 | on-chip | interrupt controller |
/Zephyr-latest/include/zephyr/arch/arm64/
Dcpu.h143 /* System register interface to GICv3 */
/Zephyr-latest/drivers/interrupt_controller/
Dintc_gicv3.c630 * In GICv3, GICR_TYPER.VLPIS bit is RES0 and can can be ignored in arm_gic_iterate_rdists()
Dintc_gicv3_its.c21 * Current ITS implementation only handle GICv3 ITS physical interruption generation
/Zephyr-latest/doc/releases/
Drelease-notes-3.2.rst652 * Fixed an addressing issue on GICv3 controllers.
1859 * :github:`50330` - Fail to find GICv3 Redistributor base address for Cortex-R52 running in a clust…
Drelease-notes-3.1.rst336 * Added support for GICv3 for the ARMv8 Xen Virtual Machine
Drelease-notes-2.4.rst485 * Enhanced GICV3 driver to support SGI API.