Home
last modified time | relevance | path

Searched full:g (Results 1 – 25 of 1086) sorted by relevance

12345678910>>...44

/Zephyr-Core-3.5.0/doc/connectivity/bluetooth/api/mesh/images/
Ddfu_stages_procedures_mesh.svg24 <g id="lend13">
26 </g>
34 <g>
36 <g id="shape7-1" transform="translate(1,-420.137)">
39 </g>
40 <g id="shape8-3" transform="translate(18.7898,-457.378)">
45 x="33.22" dy="1.2em" class="st4">Initiator</tspan></text> </g>
46 <g id="shape9-8" transform="translate(428.081,-424.35)">
50 <text x="7.27" y="532.97" class="st6">Upload stage</text> </g>
51 <g id="shape12-11" transform="translate(1,-1)">
[all …]
Ddfu_roles_mesh.svg23 <g id="lend13">
25 </g>
30 <g>
32 <g id="shape5-1" transform="translate(1,-1)">
35 </g>
36 <g id="shape6-3" transform="translate(198.903,-1)">
39 </g>
40 <g id="shape7-5" transform="translate(397.85,-1)">
43 </g>
44 <g id="shape8-7" transform="translate(4.04074,-326.984)">
[all …]
/Zephyr-Core-3.5.0/doc/security/media/
Dsensor-model.svg11 <g>
13 </g>
16 <g>
18 </g>
24 …<g id="Canvas_1" fill-opacity="1" stroke-dasharray="none" stroke="none" stroke-opacity="1" fill="n…
27 <g id="Canvas_1: sensor-drawing">
29 <g id="Graphic_40">
35 </g>
36 <g id="Graphic_39">
42 </g>
[all …]
/Zephyr-Core-3.5.0/doc/connectivity/networking/
Dzephyr_netstack_overview.svg39 <g v:mID="0" v:index="1" v:groupContext="foregroundPage">
46 <g id="shape1-1" v:mID="1" v:groupContext="shape" transform="translate(25.2651,-395.391)">
54 …<g id="shadow1-2" v:groupContext="shadow" v:shadowOffsetX="0.345598" v:shadowOffsetY="-1.97279" v:…
57 </g>
59 ….18" class="st4" v:langID="1033"><v:paragraph v:horizAlign="1"/><v:tabList/>Socket API</text> </g>
60 <g id="shape57-7" v:mID="57" v:groupContext="shape" transform="translate(25.2651,-212.311)">
68 …<g id="shadow57-8" v:groupContext="shadow" v:shadowOffsetX="0.345598" v:shadowOffsetY="-1.97279" v…
71 </g>
73 …langID="1033"><v:paragraph v:horizAlign="1"/><v:tabList/>Network Interface Abstraction</text> </g>
74 …<g id="shape60-13" v:mID="60" v:groupContext="shape" transform="translate(-327.858,369.021) rotate…
[all …]
Dzephyr_netstack_overview-tx_sequence.svg63 <g id="lend4">
65 </g>
74 <g id="lend13">
76 </g>
87 <g v:mID="7" v:index="3" v:groupContext="foregroundPage">
95 <g id="shape143-1" v:mID="143" v:groupContext="shape" transform="translate(180.875,-408.478)">
101 </g>
102 …<g id="shape94-3" v:mID="94" v:groupContext="shape" transform="translate(49.6893,-76.8633) rotate(…
105 </g>
106 …<g id="shape95-6" v:mID="95" v:groupContext="shape" transform="translate(42.0914,-234.72) rotate(-…
[all …]
Dzephyr_netstack_overview-rx_sequence.svg69 <g id="lend4">
71 </g>
76 <g id="lend5">
78 </g>
87 <g id="lend13">
89 </g>
104 <g v:mID="6" v:index="2" v:groupContext="foregroundPage">
112 <g id="shape143-1" v:mID="143" v:groupContext="shape" transform="translate(180.875,-408.478)">
118 </g>
119 …<g id="shape94-3" v:mID="94" v:groupContext="shape" transform="translate(49.6893,-76.8633) rotate(…
[all …]
/Zephyr-Core-3.5.0/boards/posix/doc/
DPort_vs_QEMU_vs.svg37 <g id="lend13">
39 </g>
45 <g v:mID="0" v:index="1" v:groupContext="foregroundPage">
50 …<g id="shape1-1" v:mID="1" v:groupContext="shape" transform="translate(-227.126,181.417) rotate(-9…
53 </g>
54 <g id="shape2-7" v:mID="2" v:groupContext="shape" transform="translate(79.0157,-124.724)">
57 </g>
58 <g id="shape3-12" v:mID="3" v:groupContext="shape" transform="translate(148.465,-53.8583)">
64 …="294.97" class="st4" v:langID="6153"><v:paragraph v:horizAlign="1"/><v:tabList/>speed</text> </g>
65 <g id="shape4-15" v:mID="4" v:groupContext="shape" transform="translate(-3.18898,-199.134)">
[all …]
DZephyr_and_bsim.svg31 <g id="lend4">
33 </g>
43 <g v:mID="4" v:index="4" v:groupContext="foregroundPage">
48 <g id="shape1-1" v:mID="1" v:groupContext="shape" transform="translate(96.5271,-72.455)">
54 …y="299.52" class="st2" v:langID="6153"><v:paragraph/><v:tabList/>HW models<v:tabChar/></text> </g>
55 <g id="shape2-4" v:mID="2" v:groupContext="shape" transform="translate(107.866,-117.809)">
61 …st2" v:langID="6153"><v:paragraph/><v:tabList/><v:newlineChar/><v:newlineChar/>Drivers</text> </g>
62 <g id="shape3-7" v:mID="3" v:groupContext="shape" transform="translate(8.65313,-72.4252)">
69 x="36.88" dy="1.2em" class="st3">Arch</tspan></text> </g>
70 <g id="shape4-11" v:mID="4" v:groupContext="shape" transform="translate(8.65313,-154.66)">
[all …]
Dlayering.svg27 <g v:mID="14" v:index="6" v:groupContext="foregroundPage">
31 <g id="shape1-1" v:mID="1" v:groupContext="shape" transform="translate(10.4612,-46.6765)">
37 …247.08" class="st2" v:langID="6153"><v:paragraph v:horizAlign="1"/><v:tabList/>CPU/SOC</text> </g>
38 <g id="shape2-4" v:mID="2" v:groupContext="shape" transform="translate(98.3352,-46.6765)">
44 … class="st2" v:langID="6153"><v:paragraph v:horizAlign="1"/><v:tabList/>HW peripherals</text> </g>
45 <g id="shape3-7" v:mID="3" v:groupContext="shape" transform="translate(109.674,-92.0309)">
51 …228.65" class="st2" v:langID="6153"><v:paragraph v:horizAlign="1"/><v:tabList/>Drivers</text> </g>
52 <g id="shape4-10" v:mID="4" v:groupContext="shape" transform="translate(10.4612,-92.0309)">
59 x="8.74" dy="1.2em" class="st4">dependent layer</tspan></text> </g>
60 <g id="shape5-14" v:mID="5" v:groupContext="shape" transform="translate(10.4612,-128.881)">
[all …]
/Zephyr-Core-3.5.0/boards/riscv/niosv_g/doc/
Dindex.rst9 niosv_g board is based on Intel FPGA Design Store Nios® V/g Hello World Example Design system and t…
13 Nios® V/g Processor Intel® FPGA IP
17 Nios® V/g hello world example design system
20 Prebuilt Nios® V/g hello world example design system is available in Intel FPGA Design store.
23 For example, Arria10 Nios® V/g processor example design system prebuilt files can be downloaded fro…
24 …t/www/us/en/design-example/776196/intel-arria-10-fpga-hello-world-design-on-nios-v-g-processor.html
28 Create Nios® V/g processor example design system in FPGA
31 Please use Intel Quartus Programmer tool to program Nios® V/g processor based system into the FPGA …
33 In order to create the Nios® V/g processor inside the FPGA device, please download the generated .s…
53 niosv-download -g <elf file>
[all …]
/Zephyr-Core-3.5.0/drivers/interrupt_controller/
Dintc_ite_it8xxx2_v2.c17 #define IT8XXX2_INTC_BASE_SHIFT(g) (IT8XXX2_INTC_BASE + ((g) << 2)) argument
20 #define IT8XXX2_INTC_ISR(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \ argument
21 ((g) < 4 ? 0x0 : 0x4))
23 #define IT8XXX2_INTC_IER(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \ argument
24 ((g) < 4 ? 0x1 : 0x5))
26 #define IT8XXX2_INTC_IELMR(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \ argument
27 ((g) < 4 ? 0x2 : 0x6))
29 #define IT8XXX2_INTC_IPOLR(g) ECREG(IT8XXX2_INTC_BASE_SHIFT(g) + \ argument
30 ((g) < 4 ? 0x3 : 0x7))
Dintc_ite_it8xxx2.c101 uint32_t g, i; in ite_intc_isr_clear() local
107 g = irq / MAX_REGISR_IRQ_NUM; in ite_intc_isr_clear()
109 isr = reg_status[g]; in ite_intc_isr_clear()
115 uint32_t g, i; in ite_intc_irq_enable() local
121 g = irq / MAX_REGISR_IRQ_NUM; in ite_intc_irq_enable()
123 en = reg_enable[g]; in ite_intc_irq_enable()
133 uint32_t g, i; in ite_intc_irq_disable() local
140 g = irq / MAX_REGISR_IRQ_NUM; in ite_intc_irq_disable()
142 en = reg_enable[g]; in ite_intc_irq_disable()
157 uint32_t g, i; in ite_intc_irq_polarity_set() local
[all …]
/Zephyr-Core-3.5.0/doc/hardware/peripherals/canbus/
Dtiming.svg4 <g>
143 </g>
145 <g id="surface1">
149 <g style="fill:rgb(0%,0%,0%);fill-opacity:1;">
152 </g>
153 <g style="fill:rgb(0%,0%,0%);fill-opacity:1;">
156 </g>
158 <g style="fill:rgb(0%,0%,0%);fill-opacity:1;">
162 </g>
166 <g style="fill:rgb(0%,0%,0%);fill-opacity:1;">
[all …]
Disotp_sequence.svg4 <g>
125 </g>
127 <g id="surface1">
131 <g style="fill:rgb(0%,0%,0%);fill-opacity:1;">
137 </g>
138 <g style="fill:rgb(0%,0%,0%);fill-opacity:1;">
140 </g>
141 <g style="fill:rgb(0%,0%,0%);fill-opacity:1;">
146 </g>
150 <g style="fill:rgb(0%,0%,0%);fill-opacity:1;">
[all …]
/Zephyr-Core-3.5.0/doc/hardware/pinctrl/images/
Dhw-dist-control.svg34 …<glyph unicode="G" horiz-adv-x="1377" d="M 1473,496 L 1473,555 C 1419,551 1278,551 1217,551 1151,5…
49 …<g ooo:slide="id1" ooo:id-list="id3 id4 id5 id6 id7 id8 id9 id10 id11 id12 id13 id14 id15 id16 id1…
52 <g id="bullet-char-template-57356" transform="scale(0.00048828125,-0.00048828125)">
54 </g>
55 <g id="bullet-char-template-57354" transform="scale(0.00048828125,-0.00048828125)">
57 </g>
58 <g id="bullet-char-template-10146" transform="scale(0.00048828125,-0.00048828125)">
60 </g>
61 <g id="bullet-char-template-10132" transform="scale(0.00048828125,-0.00048828125)">
63 </g>
[all …]
Dhw-cent-control.svg39 …<glyph unicode="G" horiz-adv-x="1377" d="M 1473,496 L 1473,555 C 1419,551 1278,551 1217,551 1151,5…
52 …<g ooo:slide="id1" ooo:id-list="id3 id4 id5 id6 id7 id8 id9 id10 id11 id12 id13 id14 id15 id16 id1…
55 <g id="bullet-char-template-57356" transform="scale(0.00048828125,-0.00048828125)">
57 </g>
58 <g id="bullet-char-template-57354" transform="scale(0.00048828125,-0.00048828125)">
60 </g>
61 <g id="bullet-char-template-10146" transform="scale(0.00048828125,-0.00048828125)">
63 </g>
64 <g id="bullet-char-template-10132" transform="scale(0.00048828125,-0.00048828125)">
66 </g>
[all …]
/Zephyr-Core-3.5.0/dts/bindings/sensor/
Dnxp,fxos8700-common.yaml36 description: Range in g
38 - 8 # 8g (0.976 mg/LSB)
39 - 4 # 4g (0.488 mg/LSB)
40 - 2 # 2g (0.244 mg/LSB)
64 resolution of 0.063 g/LSB, corresponding to an 8g acceleration
74 resolution of 0.063 g/LSB, corresponding to an 8g acceleration
84 resolution of 0.063 g/LSB, corresponding to an 8g acceleration
Dst,iis2dlpc-common.yaml32 description: Range in g. Default is power-up configuration.
34 - 16 # 16g (1.952 mg/LSB)
35 - 8 # 8g (0.976 mg/LSB)
36 - 4 # 4g (0.488 mg/LSB)
37 - 2 # 2g (0.244 mg/LSB)
71 to a 2g acceleration full-scale range. A threshold value equal to zero
79 which is equivalent to X = 12 * 2g/32 = 750mg and Z = 14 * 2g/32 = 875mg.
Dst,lis2ds12-common.yaml20 Range in g. Default is power-up configuration.
23 - 16 # 16g (0.488 mg/LSB)
24 - 8 # 8g (0.244 mg/LSB)
25 - 4 # 4g (0.122 mg/LSB)
26 - 2 # 2g (0.061 mg/LSB)
Dst,iis2iclx-common.yaml31 description: Range in g. Default is power-up configuration.
34 - 1 # 3g (0.122 mg/LSB)
35 - 2 # 1g (0.031 mg/LSB)
36 - 3 # 2g (0.061 mg/LSB)
/Zephyr-Core-3.5.0/drivers/sensor/bma280/
DKconfig62 bool "+/-2g"
65 bool "+/-4g"
68 bool "+/-8g"
71 bool "+/-16g"
/Zephyr-Core-3.5.0/arch/common/
Dfill_with_zeros.ld9 * counter) in executable segments with TrapInstr pattern, e.g. for ARM the
13 * We may want to have some section (e.g. rom_start) filled with 0x00,
14 * e.g. because MCU can interpret the pattern as a configuration data.
/Zephyr-Core-3.5.0/doc/kernel/services/threads/
Dthread_states.svg3g/1wNtaD4Ts+sPA6YRECeE7qbnaJGvDvqdeiGbzc4DavPlVhXvzEw==&lt;/diagram&gt;&lt;/mxfile&gt;"><defs/><g>…
/Zephyr-Core-3.5.0/tests/unit/cbprintf/
Dmain.c702 TEST_PRF(&rc, "%g", dv); in ZTEST()
730 TEST_PRF(&rc, "%g", dv); in ZTEST()
734 TEST_PRF(&rc, "%g", dv); in ZTEST()
749 TEST_PRF(&rc, "%f.f %F.F %e.e %E.E %g.g %G.g %a.a %A.A", in ZTEST()
753 "inf.g INF.g inf.a INF.A", rc); in ZTEST()
756 "inf.g INF.g %a.a %A.A", rc); in ZTEST()
760 TEST_PRF(&rc, "%f.f %F.F %e.e %E.E %g.g %G.g %a.a %A.A", in ZTEST()
764 "-inf.g -INF.g -inf.a -INF.A", rc); in ZTEST()
767 "-inf.g -INF.g %a.a %A.A", rc); in ZTEST()
771 TEST_PRF(&rc, "%f.f %F.F %e.e %E.E %g.g %G.g %a.a %A.A", in ZTEST()
[all …]
/Zephyr-Core-3.5.0/drivers/sensor/lsm9ds0_mfd/
DKconfig95 bool "2G"
98 bool "4G"
101 bool "6G"
104 bool "8G"
107 bool "16G"

12345678910>>...44