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/Zephyr-Core-3.6.0/dts/bindings/memory-controllers/
Dst,stm32h7-fmc.yaml5 STM32 Flexible Memory Controller (FMC).
7 The FMC allows to interface with static-memory mapped external devices such as
12 The FMC performs only one access at a time to an external device.
20 Each memory controller is defined below the FMC DeviceTree node and is managed
21 by a separate Zephyr device. However, because signals are shared the FMC
22 device handles the signals and the peripheral clocks. FMC can be enabled
25 &fmc {
30 compatible: "st,stm32h7-fmc"
32 include: ["st,stm32-fmc.yaml"]
43 The FMC bank mapping configuration (BMAP bits of FMC_BCR1).
Dst,stm32-fmc.yaml5 STM32 Flexible Memory Controller (FMC).
7 The FMC allows to interface with static-memory mapped external devices such as
12 The FMC performs only one access at a time to an external device.
20 Each memory controller is defined below the FMC DeviceTree node and is managed
21 by a separate Zephyr device. However, because signals are shared the FMC
22 device handles the signals and the peripheral clocks. FMC can be enabled
25 &fmc {
30 compatible: "st,stm32-fmc"
Dst,stm32-fmc-nor-psram.yaml7 The FMC generates the appropriate signal timings to drive the
30 The FMC NOR/PSRAM controller is defined below the FMC node and banks are
31 defined as child nodes of the FMC NOR/PSRAM controller node.
35 &fmc {
42 compatible = "st,stm32-fmc-nor-psram";
68 Use constants defined in dt-bindings/memory-controller/stm32-fmc-nor-psram.h.
70 compatible: "st,stm32-fmc-nor-psram"
118 * BMAP - FMC bank mapping.
170 in dt-bindings/memory-controller/stm32-fmc-nor-psram.h.
Dst,stm32-fmc-sdram.yaml7 The FMC SDRAM controller can be used to interface with external SDRAM
13 The FMC SDRAM controller is defined below the FMC node and SDRAM banks are
14 defined as child nodes of the FMC SDRAM node. You can either have bank 1 (@0),
15 bank 2 (@1) or both. You can enable the FMC SDRAM controller in your board
18 &fmc {
52 dt-bindings/memory-controller/stm32-fmc-sdram.h. This file is already included
76 compatible: "st,stm32-fmc-sdram"
/Zephyr-Core-3.6.0/drivers/memc/
DKconfig.stm325 bool "STM32 Flexible Memory Controller (FMC)"
14 bool "STM32 FMC SDRAM controller"
20 Enable STM32 FMC SDRAM controller.
23 bool "STM32 FMC NOR/PSRAM controller"
30 Enable STM32 FMC NOR/PSRAM controller.
Dmemc_stm32.c21 #error "No compatible FMC devicetree node found"
33 uint32_t fmc; member
49 LOG_ERR("FMC pinctrl setup failed (%d)", r); in memc_stm32_init()
53 /* enable FMC peripheral clock */ in memc_stm32_init()
63 LOG_ERR("Could not initialize FMC clock (%d)", r); in memc_stm32_init()
68 /* Enable FMC clock source */ in memc_stm32_init()
71 LOG_ERR("Could not select FMC clock (%d)", r); in memc_stm32_init()
94 .fmc = DT_INST_REG_ADDR(0),
/Zephyr-Core-3.6.0/dts/bindings/flash_controller/
Dgd,gd32-flash-controller.yaml5 There are three types GD32 FMC.
7 GD32 FMC v1: its flash memory has 1 bank, page size is equal in the bank,
10 GD32 FMC v2: its flash memory has 2 banks. Page size equal within the same bank but
11 different between banks. Flash size can be up to 3072KB. FMC v2 has two
14 GD32 FMC v3: its flash memory has 2 banks, use sector size as the minimum operating
Dnuvoton,numaker-fmc.yaml3 compatible: "nuvoton,numaker-fmc"
/Zephyr-Core-3.6.0/drivers/flash/
DKconfig.gd3219 Enable the generic backend for GD32 FMC v1 flash driver.
26 Enable the generic backend for GD32 FMC v2 flash driver.
33 Enable the generic backend for GD32 FMC v3 flash driver.
DKconfig.numaker14 This option enables the FMC driver for Nuvoton NuMaker family of
16 Say y if you wish to enable NuMaker FMC.
Dflash_gd32_v1.c21 /* Some GD32 FMC v1 series require offset and len to word aligned. */
123 LOG_ERR("FMC programming failed"); in flash_gd32_write_range()
158 LOG_ERR("FMC page %u erase failed", page_addr); in gd32_fmc_v1_page_erase()
Dflash_gd32_v2.c20 * @brief GD32 FMC v2 flash memory has 2 banks.
122 LOG_ERR("FMC bank0 programming failed"); in gd32_fmc_v2_bank0_write()
157 LOG_ERR("FMC bank0 page %u erase failed", page_addr); in gd32_fmc_v2_bank0_page_erase()
237 LOG_ERR("FMC bank1 programming failed"); in gd32_fmc_v2_bank1_write()
272 LOG_ERR("FMC bank1 page %u erase failed", page_addr); in gd32_fmc_v2_bank1_page_erase()
/Zephyr-Core-3.6.0/tests/drivers/memc/ram/
Dtestcase.yaml7 filter: dt_compat_enabled("st,stm32-fmc-nor-psram")
13 filter: dt_compat_enabled("st,stm32-fmc-sdram")
/Zephyr-Core-3.6.0/dts/arm/st/f4/
Dstm32f427.dtsi9 #include <zephyr/dt-bindings/memory-controller/stm32-fmc-sdram.h>
89 fmc: memory-controller@a0000000 { label
90 compatible = "st,stm32-fmc";
96 compatible = "st,stm32-fmc-sdram";
Dstm32f446.dtsi9 #include <zephyr/dt-bindings/memory-controller/stm32-fmc-sdram.h>
119 fmc: memory-controller@a0000000 { label
120 compatible = "st,stm32-fmc";
126 compatible = "st,stm32-fmc-sdram";
/Zephyr-Core-3.6.0/modules/
DKconfig.nuvoton39 bool "NuMaker FMC"
41 Enable Nuvoton FMC HAL module driver
/Zephyr-Core-3.6.0/drivers/display/
DKconfig.stm32_ltdc55 bool "Disable FMC bank1 for STM32F7/H7 series"
59 Disable FMC bank1 if not used to prevent speculative read accesses.
/Zephyr-Core-3.6.0/boards/arm/numaker_pfm_m467/
Dnumaker_pfm_m467_defconfig24 # Enable FMC
/Zephyr-Core-3.6.0/boards/arm/adi_eval_adin1110ebz/
Dadi_eval_adin1110ebz.dts12 #include <zephyr/dt-bindings/memory-controller/stm32-fmc-nor-psram.h>
61 fmc: memory-controller@a0000000 { label
62 compatible = "st,stm32-fmc";
67 compatible = "st,stm32-fmc-nor-psram";
285 &fmc {
/Zephyr-Core-3.6.0/boards/arm/stm32h7b3i_dk/
DKconfig.defconfig18 # display buffer to external SDRAM connected to FMC
/Zephyr-Core-3.6.0/dts/bindings/mtd/
Dgd,gd32-nv-flash-v3.yaml5 Flash memory binding of GD32 FMC v3.
Dgd,gd32-nv-flash-v1.yaml5 Flash memory binding of GD32 FMC v1.
Dgd,gd32-nv-flash-v2.yaml5 Flash memory binding of GD32 FMC v2.
/Zephyr-Core-3.6.0/boards/arm/stm32f746g_disco/
DKconfig.defconfig24 # display buffer to external SDRAM connected to FMC
/Zephyr-Core-3.6.0/boards/arm/stm32f7508_dk/
DKconfig.defconfig21 # display buffer to external SDRAM connected to FMC

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