Searched full:firc (Results 1 – 9 of 9) sorted by relevance
64 /* Fast Internal Reference Clock (FIRC) configuration */66 "Invalid SCG FIRC divider 2 value");79 #error Invalid SCG FIRC clock frequency96 /* Temporary switch to safe SIRC in order to configure FIRC */ in clk_init()
30 * Run-mode configuration for the fast internal reference clock (FIRC).42 * FIRC-based system clock configuration.228 /* Switch to SIRC so we can initialize the FIRC. */ in soc_early_init_hook()231 /* Now that we're running off of SIRC, set up and switch to FIRC. */ in soc_early_init_hook()
98 /* Fast Internal Reference Clock (FIRC) configuration */100 "Invalid SCG FIRC divider 1 value");102 "Invalid SCG FIRC divider 2 value");116 #error Invalid SCG FIRC clock frequency166 /* Temporary switch to safe SIRC in order to configure FIRC */ in clk_init()
28 When configuring system clocks higher than FIRC clock frequency,
60 /* Configuration to set FIRC to maximum frequency */ in clock_init()63 .range = kSCG_FircRange96M, /* 96 Mhz FIRC clock selected */ in clock_init()
59 The KE15 SoC is configured to run at 48 MHz using the FIRC.
78 The KE17Z SoC is configured to run at 48 MHz using the FIRC.
80 The KE17Z9 SoC is configured to run at 48 MHz using the FIRC.
319 the system timer, and the fast internal reference clock (FIRC) to generate a