| /Zephyr-Core-3.5.0/doc/kernel/services/data_passing/ |
| D | fifos.rst | 6 A :dfn:`FIFO` is a kernel object that implements a traditional
7 first in, first out (FIFO) queue, allowing threads and ISRs
17 Any number of FIFOs can be defined (limited only by available RAM). Each FIFO is
20 A FIFO has the following key properties:
25 A FIFO must be initialized before it can be used. This sets its queue to empty.
27 FIFO data items must be aligned on a word boundary, as the kernel reserves
36 FIFO data items are restricted to single active instance across all FIFO
37 data queues. Any attempt to re-add a FIFO data item to a queue before
41 A data item may be **added** to a FIFO by a thread or an ISR.
43 otherwise the item is added to the FIFO's queue.
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| /Zephyr-Core-3.5.0/tests/kernel/fifo/fifo_api/src/ |
| D | test_fifo_contexts.c | 14 struct k_fifo fifo; variable
26 /**TESTPOINT: fifo put*/ in tfifo_put()
30 /**TESTPOINT: fifo put list*/ in tfifo_put()
37 /**TESTPOINT: fifo put slist*/ in tfifo_put()
50 /*get fifo data from "fifo_put"*/ in tfifo_get()
52 /**TESTPOINT: fifo get*/ in tfifo_get()
56 /*get fifo data from "fifo_put_list"*/ in tfifo_get()
61 /*get fifo data from "fifo_put_slist"*/ in tfifo_get()
90 /**TESTPOINT: thread-thread data passing via fifo*/ in tfifo_thread_thread()
102 /**TESTPOINT: isr-thread data passing via fifo*/ in tfifo_thread_isr()
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| D | test_fifo_loop.c | 14 static struct k_fifo fifo; variable
21 /**TESTPOINT: fifo put*/ in tfifo_put()
31 /*get fifo data from "fifo_put"*/ in tfifo_get()
33 /**TESTPOINT: fifo get*/ in tfifo_get()
42 TC_PRINT("isr fifo get\n"); in tIsr_entry()
44 TC_PRINT("isr fifo put ---> "); in tIsr_entry()
50 TC_PRINT("thread fifo get\n"); in tThread_entry()
53 TC_PRINT("thread fifo put ---> "); in tThread_entry()
58 /* fifo read write job */
62 /**TESTPOINT: thread-isr-thread data passing via fifo*/ in tfifo_read_write()
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| D | test_fifo_fail.c | 17 * @brief Test FIFO get fail
24 static struct k_fifo fifo; in ZTEST() local
26 k_fifo_init(&fifo); in ZTEST()
27 /**TESTPOINT: fifo get returns NULL*/ in ZTEST()
28 zassert_is_null(k_fifo_get(&fifo, K_NO_WAIT), NULL); in ZTEST()
29 zassert_is_null(k_fifo_get(&fifo, TIMEOUT), NULL); in ZTEST()
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| /Zephyr-Core-3.5.0/tests/kernel/fifo/fifo_timeout/src/ |
| D | main.c | 16 * @brief Test fifo APIs timeout
18 * This module tests following fifo timeout scenarios
24 * of queueing/dequeueing when timeout occurs, first on one fifo, then on
27 * Finally, multiple threads pend on one fifo, and they all get the
44 struct k_fifo *fifo; member
112 /* a thread sleeps then puts data on the fifo */
121 /* a thread pends on a fifo then times out */
131 packet = k_fifo_get(d->fifo, K_MSEC(d->timeout)); in test_thread_pend_and_timeout()
165 LOG_DBG(" thread (q order: %d, t/o: %d, fifo %p)", in test_multiple_threads_pending()
166 data->q_order, data->timeout, data->fifo); in test_multiple_threads_pending()
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| /Zephyr-Core-3.5.0/drivers/i2c/ |
| D | i2c_xilinx_axi.h | 22 REG_TX_FIFO = 0x108, /* Transmit FIFO */
23 REG_RX_FIFO = 0x10C, /* Receive FIFO */
25 REG_TX_FIFO_OCY = 0x114, /* Transmit FIFO Occupancy */
26 REG_RX_FIFO_OCY = 0x118, /* Receive FIFO Occupancy */
28 REG_RX_FIFO_PIRQ = 0x120, /* Receive FIFO Programmable Depth Interrupt */
48 ISR_TX_HALF_EMPTY = BIT(7), /* Transmit FIFO Half Empty */
52 ISR_RX_FIFO_FULL = BIT(3), /* Receive FIFO Full */
53 ISR_TX_FIFO_EMPTY = BIT(2), /* Transmit FIFO Empty */
70 CR_TX_FIFO_RST = BIT(1), /* Transmit FIFO Reset */
76 SR_TX_FIFO_EMPTY = BIT(7), /* Transmit FIFO empty */
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| /Zephyr-Core-3.5.0/dts/bindings/serial/ |
| D | infineon,xmc4xxx-uart.yaml | 34 fifo-start-offset:
36 Each USIC0..2 has a fifo that is shared between two channels. For example,
37 usic0ch0 and usic0ch1 will share the same fifo. This parameter defines an offset
38 where the tx and rx fifos will start. When sharing the fifo, the user must properly
39 define the offset based on the configuration of the other channel. The fifo has a
40 capacity of 64 entries. The tx/rx fifos are created on fifo-xx-size aligned
46 fifo-tx-size:
48 Fifo size used for buffering transmit bytes. A value of 0 implies that
49 the fifo is not used while transmitting. transmitting. If the UART is used in async mode
50 then fifo-tx-size should be set to 0.
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| D | zephyr,cdc-acm-uart.yaml | 13 tx-fifo-size:
17 Size of the virtual CDC ACM UART TX FIFO
19 rx-fifo-size:
23 Size of the virtual CDC ACM UART RX FIFO
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| D | zephyr,uart-emul.yaml | 11 tx-fifo-size:
15 Size of the virtual UART TX FIFO
17 rx-fifo-size:
21 Size of the virtual UART RX FIFO
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| D | altr,jtag-uart.yaml | 11 write-fifo-depth:
15 Buffer size of transmit fifo. This used to implement irq_tx_complete.
16 Must be same as Write FIFO: Buffer depth (bytes) in platform designer.
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| /Zephyr-Core-3.5.0/dts/bindings/dma/ |
| D | gd,gd32-dma-v1.yaml | 5 GD32 DMA controller with FIFO
48 fifo-threshold: A 32bit bitfield value specifying FIFO threshold
49 - bit 0-1: Depth of DMA's FIFO used by burst-transfer.
77 The fifo-threshold cell that places the fourth is configuring FIFO threshold.
79 burst-length in the dma_config struct, and fifo-threshold.
80 A single burst transfer transfers [(4 * fifo-threshold)] bytes using with DMA's FIFO.
83 If the fifo-threshold is a 2-word case, it runs one burst transfer to transfer 8 bytes.
84 Or the fifo-threshold is a 4-word case, runs two times burst transfer to transferring 8 bytes each
99 - fifo-threshold
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| /Zephyr-Core-3.5.0/tests/kernel/fifo/fifo_usage/src/ |
| D | main.c | 9 * @brief Use fifo API's in different scenarios
14 * Test Thread enters items into a fifo, starts the Child Thread
16 * the fifo and enters some items back into the fifo. Child Thread
18 * is returned back to Test Thread, it extracts all items from the fifo.
49 /* Data to put into FIFO */
63 /* Put items into fifo */ in tIsr_entry_put()
75 /* Get items from fifo */ in tIsr_entry_get()
88 /* Get items from fifo */ in thread_entry_fn_single()
94 /* Put items into fifo */ in thread_entry_fn_single()
136 * @brief Tests single fifo get and put operation in thread context
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| /Zephyr-Core-3.5.0/dts/bindings/usb/ |
| D | renesas,smartbond-usbd.yaml | 32 fifo-read-threshold:
35 RX FIFO is 64 bytes. When endpoint size is greater then 64,
36 FIFO warning interrupt is enabled to allow read incoming data
40 possible and when FIFO is hardly filled exit interrupt handler
41 waiting for next FIFO warning level interrupt or packet end.
42 When running at 96MHz code that reads FIFO based on number of
44 fill FIFO with two additional bytes.
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| /Zephyr-Core-3.5.0/tests/bsim/bluetooth/ll/edtt/common/ |
| D | edtt_driver_bsim.c | 35 /* In this mode, when the EDTTool closes the FIFO we automatically terminate
42 static int fifo[2] = { -1, -1 }; variable
141 if (write(fifo[TO_EDTT], ptr, size) != size) { in edtt_write()
147 bs_trace_error_line("EDTT IF filled up (FIFO " in edtt_write()
204 fifo[TO_EDTT] = open(fifo_path[TO_EDTT], O_WRONLY); in edptd_create_fifo_if()
205 if (fifo[TO_EDTT] == -1) { in edptd_create_fifo_if()
209 flags = fcntl(fifo[TO_EDTT], F_GETFL); in edptd_create_fifo_if()
211 fcntl(fifo[TO_EDTT], F_SETFL, flags); in edptd_create_fifo_if()
214 fifo[TO_DEVICE] = open(fifo_path[TO_DEVICE], O_RDONLY); in edptd_create_fifo_if()
215 if (fifo[TO_DEVICE] == -1) { in edptd_create_fifo_if()
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| /Zephyr-Core-3.5.0/dts/bindings/can/ |
| D | bosch,m_can-base.yaml | 13 rx-buffer-elements tx-event-fifo-elements tx-buffer-elements>
17 specify how many elements are allocated for each filter type/FIFO/buffer.
22 Rx FIFO 0 0-64 elements / 0-1152 words
23 Rx FIFO 1 0-64 elements / 0-1152 words
25 Tx Event FIFO 0-32 elements / 0-64 words
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| /Zephyr-Core-3.5.0/subsys/tracing/test/ |
| D | tracing_test.h | 203 /* FIFO */
205 #define sys_port_trace_k_fifo_init_enter(fifo) sys_trace_k_fifo_init_enter(fifo) argument
207 #define sys_port_trace_k_fifo_init_exit(fifo) sys_trace_k_fifo_init_exit(fifo) argument
209 #define sys_port_trace_k_fifo_cancel_wait_enter(fifo) sys_trace_k_fifo_cancel_wait_enter(fifo) argument
211 #define sys_port_trace_k_fifo_cancel_wait_exit(fifo) sys_trace_k_fifo_cancel_wait_exit(fifo) argument
213 #define sys_port_trace_k_fifo_put_enter(fifo, data) sys_trace_k_fifo_put_enter(fifo, data) argument
215 #define sys_port_trace_k_fifo_put_exit(fifo, data) sys_trace_k_fifo_put_exit(fifo, data) argument
217 #define sys_port_trace_k_fifo_alloc_put_enter(fifo, data) \ argument
218 sys_trace_k_fifo_alloc_put_enter(fifo, data)
220 #define sys_port_trace_k_fifo_alloc_put_exit(fifo, data, ret) \ argument
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| /Zephyr-Core-3.5.0/dts/bindings/spi/ |
| D | nxp,kinetis-dspi.yaml | 62 rx-fifo-overwrite:
65 receive FIFO overflow overwrite enable. If ROOE = 0, the incoming
75 tx-fifo-size:
78 tx fifo size
80 rx-fifo-size:
83 rx fifo size
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| /Zephyr-Core-3.5.0/scripts/pylib/pytest-twister-harness/src/twister_harness/device/ |
| D | fifo_handler.py | 19 Class dedicated for handling communication over POSIX system FIFO (named
25 :param fifo_path: path to basic fifo name
26 :param timeout: timeout for establishing connection over FIFO
40 Opening FIFO could be a blocking operation (it requires also opening
41 FIFO on the other side - by separate program/process). So, to avoid
42 blockage, execute opening FIFO in separate thread and additionally run
69 Monitor opening FIFO operation - if timeout was expired (or disconnect
70 was called in the meantime), then interrupt opening FIFO in other
83 This is workaround for unblocking opening FIFO operation - imitate
84 opening FIFO "on the other side".
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| /Zephyr-Core-3.5.0/tests/benchmarks/app_kernel/src/ |
| D | fifo_b.c | 30 PRINT_F(FORMAT, "enqueue 1 byte msg in FIFO", in queue_test()
40 PRINT_F(FORMAT, "dequeue 1 byte msg in FIFO", in queue_test()
50 PRINT_F(FORMAT, "enqueue 4 bytes msg in FIFO", in queue_test()
60 PRINT_F(FORMAT, "dequeue 4 bytes msg in FIFO", in queue_test()
73 "enqueue 1 byte msg in FIFO to a waiting higher priority task", in queue_test()
84 "enqueue 4 bytes in FIFO to a waiting higher priority task", in queue_test()
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| /Zephyr-Core-3.5.0/include/zephyr/tracing/ |
| D | tracing.h | 1070 * @brief FIFO Tracing APIs
1071 * @defgroup subsys_tracing_apis_fifo FIFO Tracing APIs
1076 * @brief Trace initialization of FIFO Queue entry
1077 * @param fifo FIFO object
1079 #define sys_port_trace_k_fifo_init_enter(fifo) argument
1082 * @brief Trace initialization of FIFO Queue exit
1083 * @param fifo FIFO object
1085 #define sys_port_trace_k_fifo_init_exit(fifo) argument
1088 * @brief Trace FIFO Queue cancel wait entry
1089 * @param fifo FIFO object
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| /Zephyr-Core-3.5.0/subsys/tracing/user/ |
| D | tracing_user.h | 202 #define sys_port_trace_k_fifo_init_enter(fifo) argument
203 #define sys_port_trace_k_fifo_init_exit(fifo) argument
204 #define sys_port_trace_k_fifo_cancel_wait_enter(fifo) argument
205 #define sys_port_trace_k_fifo_cancel_wait_exit(fifo) argument
206 #define sys_port_trace_k_fifo_put_enter(fifo, data) argument
207 #define sys_port_trace_k_fifo_put_exit(fifo, data) argument
208 #define sys_port_trace_k_fifo_alloc_put_enter(fifo, data) argument
209 #define sys_port_trace_k_fifo_alloc_put_exit(fifo, data, ret) argument
210 #define sys_port_trace_k_fifo_put_list_enter(fifo, head, tail) argument
211 #define sys_port_trace_k_fifo_put_list_exit(fifo, head, tail) argument
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| /Zephyr-Core-3.5.0/drivers/serial/ |
| D | Kconfig.ns16550 | 40 bool "UART 16550 (16-bytes FIFO)"
42 This enables support for 16-bytes FIFO if UART controller is 16550.
45 bool "UART 16750 (64-bytes FIFO and auto flow control)"
47 This enables support for 64-bytes FIFO and automatic hardware
51 bool "UART 16950 (128-bytes FIFO and auto flow control)"
53 This enables support for 128-bytes FIFO and automatic hardware flow control.
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| D | Kconfig.sifive | 29 Port 0 RX Threshold at which the RX FIFO interrupt triggers.
36 Port 0 TX Threshold at which the TX FIFO interrupt triggers.
52 Port 1 RX Threshold at which the RX FIFO interrupt triggers.
59 Port 1 TX Threshold at which the TX FIFO interrupt triggers.
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| D | Kconfig.xmc4xxx | 20 bool "Continue to trigger fifo rx interrupt"
24 if there is data in the receive fifo. Otherwise, an interrupt will
25 trigger only once on the first received byte. The receive fifo will
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| /Zephyr-Core-3.5.0/tests/drivers/uart/uart_basic_api/src/ |
| D | test_uart_fifo.c | 11 * @brief TestPurpose: verify UART works well in fifo mode
14 * - FIFO Output:
21 * - FIFO Input:
28 * -# When test UART FIFO output, the number of characters actually
30 * -# When test UART FIFO input, the app will wait for input from UART
40 static const char fifo_data[] = "This is a FIFO test.\r\n";
65 * be able to put at least one byte into a FIFO. If not, in uart_fifo_callback()
111 /* Enable Tx/Rx interrupt before using fifo */ in test_fifo_read()
143 /* Enable Tx/Rx interrupt before using fifo */ in test_fifo_fill()
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