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/Zephyr-Core-3.5.0/drivers/interrupt_controller/
DKconfig.xec1 # Microchip XEC ECIA configuration
7 bool "External EC Interrupt Aggregator (ECIA) Driver for MCHP MEC family of MCUs"
11 Enable XEC ECIA driver for Microchip MEC line of MCUs
Dintc_mchp_ecia_xec.c10 * Driver is currently implemented to support MEC172x ECIA GIRQs
22 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
33 * MEC SoC's have one and only one instance of ECIA. GIRQ8 register are located
34 * at the beginning of the ECIA block.
37 ((struct ecia_regs *)(DT_REG_ADDR(DT_NODELABEL(ecia))))
452 DT_FOREACH_CHILD(DT_NODELABEL(ecia), XEC_CHK_REQ_AGGR) \
501 * @brief initialize XEC ECIA driver
516 struct ecia_regs *const ecia = (struct ecia_regs *)cfg->ecia_base; in xec_ecia_init() local
534 ecia->BLK_EN_CLR = UINT32_MAX; in xec_ecia_init()
537 ecia->BLK_EN_SET = MCHP_ECIA_AGGR_BITMAP; in xec_ecia_init()
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/Zephyr-Core-3.5.0/dts/arm/microchip/
Dmec172xnsz.dtsi14 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
80 ecia: ecia@4000e000 { label
81 compatible = "microchip,xec-ecia";
91 compatible = "microchip,xec-ecia-girq";
102 compatible = "microchip,xec-ecia-girq";
113 compatible = "microchip,xec-ecia-girq";
124 compatible = "microchip,xec-ecia-girq";
135 compatible = "microchip,xec-ecia-girq";
146 compatible = "microchip,xec-ecia-girq";
154 compatible = "microchip,xec-ecia-girq";
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Dmec1727nsz.dtsi12 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
Dmec1501hsz.dtsi82 ecia: ecia@4000e000 { label
/Zephyr-Core-3.5.0/dts/bindings/interrupt-controller/
Dmicrochip,xec-ecia.yaml3 compatible: "microchip,xec-ecia"
Dmicrochip,xec-ecia-girq.yaml3 compatible: "microchip,xec-ecia-girq"
/Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec172x/reg/
Dmec172x_ecia.h14 #define ECIA_BASE_ADDR DT_REG_ADDR(DT_NODELABEL(ecia))
53 * ECIA registers
57 * This numbering only affects the ECIA BLOCK_EN_SET, BLOCK_EN_CLR, and
1138 /** @brief ECIA registers with each GIRQ elucidated */
1165 /** @brief ECIA registers with array of GIRQ's */
1174 /* Until XEC ECIA driver is available we define these locally */
1181 struct ecia_regs *ecia = (struct ecia_regs *)(ECIA_BASE_ADDR); in mchp_soc_ecia_girq_aggr_en() local
1184 ecia->BLK_EN_SET = BIT(girq); in mchp_soc_ecia_girq_aggr_en()
1186 ecia->BLK_EN_CLR = BIT(girq); in mchp_soc_ecia_girq_aggr_en()
1197 struct ecia_regs *ecia = (struct ecia_regs *)(ECIA_BASE_ADDR); in mchp_soc_ecia_girq_src_clr() local
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/Zephyr-Core-3.5.0/dts/bindings/crypto/
Dmicrochip,xec-symcr.yaml20 description: XEC ECIA GIRQ number and bit position.
/Zephyr-Core-3.5.0/include/zephyr/drivers/interrupt_controller/
Dintc_mchp_xec_ecia.h13 * Chapter: EC Interrupt Aggregator (ECIA)
56 /* callback for ECIA GIRQ interrupt source */
204 /** @brief Clear external NVIC input pending status given encoded ECIA info.
/Zephyr-Core-3.5.0/dts/bindings/espi/
Dmicrochip,xec-espi-vw-routing.yaml13 VW registers and ECIA GIRQ registers.
/Zephyr-Core-3.5.0/boards/arm/mec172xmodular_assy6930/
Dmec172xmodular_assy6930.dts53 /* Initialize ECIA. Does not initialize child devices */
54 &ecia {
/Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec172x/
DKconfig.soc76 # GPIO initialization depends on ECIA initialization, which happen at
Ddevice_power.c18 ((struct ecia_named_regs *)(DT_REG_ADDR(DT_NODELABEL(ecia))))
/Zephyr-Core-3.5.0/boards/arm/mec172xevb_assy6906/
Dmec172xevb_assy6906.dts57 /* Initialize ECIA. Does not initialize child devices */
58 &ecia {
/Zephyr-Core-3.5.0/soc/arm/microchip_mec/mec1501/
Dsoc.c16 * Initialize MEC1501 EC Interrupt Aggregator (ECIA) and external NVIC
/Zephyr-Core-3.5.0/drivers/timer/
Dmchp_xec_rtos_timer.c60 ((struct ecia_regs *)DT_REG_ADDR(DT_NODELABEL(ecia)))
/Zephyr-Core-3.5.0/drivers/espi/
Despi_mchp_xec_v2.c16 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
1090 * ECIA driver.
1538 * in the ECIA driver in espi_xec_init()
Despi_mchp_xec_host_v2.c16 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
Despi_saf_mchp_xec_v2.c17 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
/Zephyr-Core-3.5.0/drivers/dma/
Ddma_mchp_xec.c15 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
/Zephyr-Core-3.5.0/drivers/spi/
Dspi_xec_qmspi_ldma.c20 #include <zephyr/dt-bindings/interrupt-controller/mchp-xec-ecia.h>
/Zephyr-Core-3.5.0/drivers/serial/
Duart_mchp_xec.c942 /* clear ECIA GIRQ R/W1C status bit after UART status cleared */ in uart_xec_isr()
/Zephyr-Core-3.5.0/doc/releases/
Drelease-notes-2.7.rst852 :dtcompatible:`microchip,xec-adc-v2`, :dtcompatible:`microchip,xec-ecia`,
853 :dtcompatible:`microchip,xec-ecia-girq`,