Searched full:decimation (Results 1 – 14 of 14) sorted by relevance
24 Adjust length of decimation filter. Controls duration of each measurement.30 Adjust length of decimation filter. Controls duration of each measurement.
14 decimation-rate = <MC3419_DECIMATE_IDR_BY_1>;54 decimation-rate:81 Default is Decimation 0 (reset value of the register).
27 * Adjust length of decimation filter. Controls duration of34 * Adjust length of decimation filter. Controls duration of
80 pdm_filter[i].Decimation = factor; in sw_filter_lib_init()124 * The number of PDM bytes per PCM sample is the decimation factor in sw_filter_lib_run()129 pdm_offset = j * (pdm_filter[0].Decimation / 8) * pdm_filter[0].In_MicChannels; in sw_filter_lib_run()132 switch (pdm_filter[0].Decimation) { in sw_filter_lib_run()
135 /* highest performance class with each decimation filter */
361 /* determine decimation filter type */ in codec_configure_filters()
107 /* Control of the CIC filter plus voice channel (B) FIR decimation factor */236 * accumulated due to decimation.262 /* FIR decimation filter is started. */283 /* Decimation factor of the FIR filter minus 1. */287 * accumulated due to decimation.
110 /* Control of the CIC filter plus voice channel (B) FIR decimation factor */236 * accumulated due to decimation.277 /* FIR decimation filter is started. */301 /* Decimation factor of the FIR filter minus 1. */305 * accumulated due to decimation.
7 as channel power modes, data rates, filters, decimation, and scales. These can
65 oversampling/decimation factor equal to 128, resulting in a 2.048MHz bit clock.70 case the oversampling/decimation factor will be 64.
76 oversampling/decimation factor to result in approximately a 2MHz bit clock.
148 LOG_ERR("Failed to set decimation rate (%d)", ret); in mc3419_set_odr()
168 /* find the max and min one decimation point */ in uart_b91_cal_div_and_bwpc()
151 LOG_ERR("zero clock divide or decimation factor"); in dai_nhlt_get_clock_div()
