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/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/
Dhse_24.overlay13 clock-frequency = <DT_FREQ_M(24)>; /* 24MHz clock */
19 clock-frequency = <DT_FREQ_M(24)>;
Dhse_32.overlay13 clock-frequency = <DT_FREQ_M(32)>; /* 32MHz oscillator */
19 clock-frequency = <DT_FREQ_M(32)>;
Dhse_8.overlay14 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
20 clock-frequency = <DT_FREQ_M(8)>;
Dhse_8_bypass.overlay14 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
20 clock-frequency = <DT_FREQ_M(8)>;
Dwl_32_hse.overlay15 clock-frequency = <DT_FREQ_M(32)>;
21 clock-frequency = <DT_FREQ_M(32)>;
Df0_f3_pll_32_hsi_8.overlay13 clock-frequency = <DT_FREQ_M(8)>;
26 clock-frequency = <DT_FREQ_M(32)>;
Df0_f3_pll_32_hse_8.overlay14 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
27 clock-frequency = <DT_FREQ_M(32)>;
Df1_pll_64_hse_8.overlay14 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
27 clock-frequency = <DT_FREQ_M(64)>;
Dpll_32_hse_8.overlay14 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
27 clock-frequency = <DT_FREQ_M(32)>;
Dpll_170_hse_24.overlay13 clock-frequency = <DT_FREQ_M(24)>;
29 clock-frequency = <DT_FREQ_M(170)>;
Df2_f4_f7_pll_64_hse_8.overlay14 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
29 clock-frequency = <DT_FREQ_M(64)>;
Dpll_64_hse_8.overlay14 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
29 clock-frequency = <DT_FREQ_M(64)>;
Dwb_pll_48_hsi_16.overlay14 clock-frequency = <DT_FREQ_M(16)>;
30 clock-frequency = <DT_FREQ_M(48)>;
Dwb_pll_64_hse_32.overlay14 clock-frequency = <DT_FREQ_M(32)>; /* X1 32MHz oscillator */
30 clock-frequency = <DT_FREQ_M(64)>;
Dwl_pll_48_hse_32.overlay16 clock-frequency = <DT_FREQ_M(32)>;
32 clock-frequency = <DT_FREQ_M(48)>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core/boards/
Dhse_8.overlay14 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
20 clock-frequency = <DT_FREQ_M(8)>;
Dpll_hse_96.overlay14 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
30 clock-frequency = <DT_FREQ_M(96)>;
/Zephyr-latest/boards/seagate/legend/
Dlegend_stm32f070xb_25ssd.overlay13 clock-frequency = <DT_FREQ_M(24)>; /* 24MHz external clock */
26 clock-frequency = <DT_FREQ_M(48)>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/boards/
Dhse24.overlay20 clock-frequency = <DT_FREQ_M(24)>;
25 clock-frequency = <DT_FREQ_M(24)>;
Dhse25.overlay19 clock-frequency = <DT_FREQ_M(25)>;
26 clock-frequency = <DT_FREQ_M(25)>;
Dpll_hse24_100.overlay20 clock-frequency = <DT_FREQ_M(24)>;
35 clock-frequency = <DT_FREQ_M(100)>;
Dpll_hse24_240.overlay20 clock-frequency = <DT_FREQ_M(24)>;
35 clock-frequency = <DT_FREQ_M(240)>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_core/boards/
Dhse_16.overlay19 clock-frequency = <DT_FREQ_M(16)>;
25 clock-frequency = <DT_FREQ_M(16)>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32wba_core/boards/
Dpll_hse_100.overlay14 clock-frequency = <DT_FREQ_M(32)>;
28 clock-frequency = <DT_FREQ_M(100)>;
Dpll_hse_100_ahb_50.overlay14 clock-frequency = <DT_FREQ_M(32)>;
29 clock-frequency = <DT_FREQ_M(50)>;

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