| /Zephyr-latest/cmake/sca/eclair/ECL/ |
| D | zephyr_common_config.ecl | 38 -config=MC3R1.D4.9,macros+={deliberate,"name(ARG_UNUSED)"}
39 -config=MC3R1.D4.9,macros+={deliberate,"name(CONSTEXPR)"}
40 -config=MC3R1.D4.9,macros+={deliberate,"name(compiler_barrier)"}
41 -config=MC3R1.D4.9,macros+={deliberate,"name(likely)"}
42 -config=MC3R1.D4.9,macros+={deliberate,"name(unlikely)"}
46 -config=MC3R1.D4.9,macros+={questionable,"name(ATOMIC_ELEM)"}
47 -config=MC3R1.D4.9,macros+={questionable,"name(ATOMIC_MASK)"}
48 -config=MC3R1.D4.9,macros+={questionable,"name(BIT32)"}
49 -config=MC3R1.D4.9,macros+={questionable,"name(BIT64)"}
50 -config=MC3R1.D4.9,macros+={questionable,"name(BIT64_MASK)"}
[all …]
|
| D | analysis_STU.ecl | 13 -enable=MC3R1.D4.13
14 -enable=MC3R1.D4.2
15 -enable=MC3R1.D4.4
16 -enable=MC3R1.D4.5
17 -enable=MC3R1.D4.8
18 -enable=MC3R1.D4.11
19 -enable=MC3R1.D4.12
20 -enable=MC3R1.D4.14
21 -enable=MC3R1.D4.7
|
| D | analysis_heavy_STU.ecl | 13 -enable=MC3R1.D4.6
14 -enable=MC3R1.D4.9
|
| D | analysis_WP.ecl | 28 -enable=MC3R1.D4.1
29 -enable=MC3R1.D4.10
|
| /Zephyr-latest/dts/bindings/gpio/ |
| D | nxp,cam-44pins-connector.yaml | 23 30 MIPI_CSI_DN0/D4 MIPI_CSI_DN0/D4 29
|
| D | nxp,parallel-lcd-connector.yaml | 22 24-28 LCD D0-D4
|
| D | adafruit-feather-header.yaml | 34 11 D4 SDA 12
|
| D | sparkfun-pro-micro-header.yaml | 25 4 D4/A6 D19/A1 19
|
| /Zephyr-latest/tests/subsys/shell/shell_device/src/ |
| D | main.c | 51 static const struct device *d4 = &DEVICE_NAME_GET(device_4); variable
68 pm_device_runtime_enable(d4); in main()
69 pm_device_runtime_get(d4); in main()
|
| /Zephyr-latest/boards/lilygo/ttgo_lora32/doc/ |
| D | index.rst | 6 The Lilygo TTGO LoRa32 is a development board for LoRa applications based on the ESP32-PICO-D4.
10 - ESP32-PICO-D4 chip (240MHz dual core, 600 DMIPS, 520KB SRAM, Wi-Fi)
25 .. _ESP32-PICO-D4: https://www.espressif.com/sites/default/files/documentation/esp32-pico-d4_datash…
31 | ESP32-PICO-D4 | This `ESP32-PICO-D4`_ module provides complete Wi-Fi and Bluetooth |
112 bootstrap the board with the ESP32-PICO-D4 SoC.
124 By default, the ESP32-PICO-D4 sysbuild creates bootloader (MCUboot) and application
218 - `ESP32-PICO-D4 Datasheet <https://www.espressif.com/sites/default/files/documentation/esp32-pico-…
|
| /Zephyr-latest/boards/shields/x_nucleo_iks01a2/ |
| D | x_nucleo_iks01a2_shub.overlay | 12 irq-gpios = <&arduino_header 10 GPIO_ACTIVE_HIGH>; /* D4 */
|
| D | x_nucleo_iks01a2.overlay | 31 irq-gpios = <&arduino_header 10 GPIO_ACTIVE_HIGH>; /* D4 */
|
| /Zephyr-latest/samples/subsys/dap/ |
| D | app.overlay | 12 clk-gpios = <&arduino_header 10 GPIO_ACTIVE_HIGH>; /* D4 */
|
| /Zephyr-latest/boards/shields/nrf7002ek/ |
| D | nrf7002ek_coex.overlay | 16 /* D4 */
|
| /Zephyr-latest/samples/bluetooth/hci_ipc/boards/ |
| D | nrf5340_audio_dk_nrf5340_cpunet_nrf21540_ek.overlay | 7 ant-sel-gpios = <&arduino_header 10 GPIO_ACTIVE_HIGH>; /* D4 */
|
| /Zephyr-latest/samples/subsys/dap/boards/ |
| D | nrf52840dk_nrf52840.overlay | 11 clk-gpios = <&arduino_header 10 GPIO_ACTIVE_HIGH>; /* D4 */
|
| /Zephyr-latest/subsys/net/lib/socks/ |
| D | socks.c | 126 const struct sockaddr_in *d4 = in socks5_tcp_connect() local
132 (uint8_t *)&d4->sin_addr, in socks5_tcp_connect()
135 cmd_req.ipv4_addr.port = d4->sin_port; in socks5_tcp_connect()
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| /Zephyr-latest/boards/shields/adafruit_2_8_tft_touch_v2/ |
| D | adafruit_2_8_tft_touch_v2_nano.overlay | 19 gpio-map = <10 0 &arduino_nano_header 4 0>, /* D4 */
|
| /Zephyr-latest/boards/shields/semtech_sx1272mb2das/ |
| D | semtech_sx1272mb2das.overlay | 27 <&arduino_header 10 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* DIO2 is D4 */
|
| /Zephyr-latest/boards/shields/semtech_sx1276mb1mas/ |
| D | semtech_sx1276mb1mas.overlay | 27 <&arduino_header 10 (GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH)>, /* DIO2 is D4 */
|
| /Zephyr-latest/boards/seeed/xiao_esp32c3/ |
| D | seeed_xiao_connector.dtsi | 17 <4 0 &gpio0 6 0>, /* D4 */
|
| /Zephyr-latest/boards/seeed/xiao_esp32c6/ |
| D | seeed_xiao_connector.dtsi | 17 <4 0 &gpio0 22 0>, /* D4 */
|
| /Zephyr-latest/boards/seeed/xiao_rp2040/ |
| D | seeed_xiao_connector.dtsi | 18 , <4 0 &gpio0 6 0> /* D4 */
|
| /Zephyr-latest/boards/adafruit/qt_py_esp32s3/ |
| D | seeed_xiao_connector.dtsi | 17 <4 0 &gpio0 7 0>, /* D4 */
|
| /Zephyr-latest/boards/adafruit/qt_py_rp2040/ |
| D | seeed_xiao_connector.dtsi | 17 <4 0 &gpio0 24 0>, /* D4 */
|
