| /Zephyr-latest/soc/espressif/common/ |
| D | Kconfig.flash | 18 Enable this to support auto detection of ISSI chips if chip vendor not directly
19 given by ``chip_drv`` member of the chip struct. This adds support for variant
26 Enable this to support auto detection of MXIC chips if chip vendor not directly
27 given by ``chip_drv`` member of the chip struct. This adds support for variant
34 Enable this to support auto detection of GD (GigaDevice) chips if chip vendor not
35 directly given by ``chip_drv`` member of the chip struct. If you are using Wrover
40 size. Note that the default chip driver supports the GD chips with product ID
47 Enable this to support auto detection of Winbond chips if chip vendor not directly
48 given by ``chip_drv`` member of the chip struct. This adds support for variant
55 Enable this to support auto detection of BOYA chips if chip vendor not directly
[all …]
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| /Zephyr-latest/tests/kernel/device/src/ |
| D | mmio_multireg.c | 20 DEVICE_MMIO_NAMED_RAM(chip);
27 DEVICE_MMIO_NAMED_ROM(chip);
32 DEVICE_MMIO_NAMED_ROM_INIT_BY_NAME(chip, DT_DRV_INST(0)),
41 DEVICE_MMIO_NAMED_MAP(dev, chip, K_MEM_CACHE_NONE); in foo_multireg_init()
69 regs_chip = DEVICE_MMIO_NAMED_GET(dev, chip); in ZTEST()
71 rom_chip = DEVICE_MMIO_NAMED_ROM_PTR(dev, chip); in ZTEST()
78 zassert_equal(rom_chip->phys_addr, DT_INST_REG_ADDR_BY_NAME(0, chip), in ZTEST()
79 "bad phys_addr (chip)"); in ZTEST()
80 zassert_equal(rom_chip->size, DT_INST_REG_SIZE_BY_NAME(0, chip), in ZTEST()
81 "bad size (chip)"); in ZTEST()
[all …]
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| /Zephyr-latest/scripts/west_commands/runners/ |
| D | probe_rs.py | 12 def __init__(self, cfg, chip, argument
22 self.args = ['--chip', chip]
45 parser.add_argument('--chip', required=True,
46 help='chip name')
57 e.g. --chip-description-path=/path/to/chip.yml'''
61 return ProbeRsBinaryRunner(cfg, args.chip,
75 download_args += ['--chip-erase']
|
| /Zephyr-latest/dts/bindings/mtd/ |
| D | atmel,at45.yaml | 36 Value of zero means that the flash chip has all sectors of equal size.
48 no-chip-erase:
51 If set, indicates that the chip does not support the chip erase command.
56 If set, indicates that the chip does not support the sector erase command.
62 of the default Deep Power-Down one to put the chip into low power mode.
65 SRAM buffers in the chip, the difference between the Deep and Ultra-Deep
66 Power-Down modes is that the chip consumes far less power in the latter
73 Time, in nanoseconds, needed by the chip to enter the Deep Power-Down
81 Time, in nanoseconds, needed by the chip to exit from the Deep Power-Down
|
| /Zephyr-latest/boards/microchip/ev11l78a/doc/ |
| D | index.rst | 34 - on-chip
37 - on-chip
40 - on-chip
43 - on-chip
46 - on-chip
49 - on-chip
52 - on-chip
55 - on-chip
58 - on-chip
|
| /Zephyr-latest/boards/96boards/carbon/doc/ |
| D | nrf51822.rst | 9 This is the secondary nRF51822 chip on the 96Boards Carbon and provides
10 Bluetooth functionality to the main STM32F401RET chip via SPI.
16 unless they want to reprogram the secondary chip which provides
29 different chip.
37 | NVIC | on-chip | nested vector interrupt controller |
39 | RTC | on-chip | system clock |
41 | UART | on-chip | serial port |
43 | GPIO | on-chip | gpio |
45 | FLASH | on-chip | flash |
47 | SPIS | on-chip | SPI slave |
[all …]
|
| /Zephyr-latest/boards/atmel/sam0/samd20_xpro/doc/ |
| D | index.rst | 36 - on-chip
39 - on-chip
42 - on-chip
45 - on-chip
48 - on-chip
51 - on-chip
54 - on-chip
57 - on-chip
60 - on-chip
78 with the on-chip PLL generating the 48 MHz system clock.
[all …]
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| /Zephyr-latest/soc/nuvoton/npcm/common/esiost/ |
| D | esiost_args.py | 63 """populate the chip related fields for the esiost"""
65 chip = str(self.chip_name).lower()
67 if chip not in CHIPS_INFO:
71 self.chip_ram_address = CHIPS_INFO[chip]['ram_address']
72 self.chip_ram_size = CHIPS_INFO[chip]['ram_size']
87 elif (arg == "chip") & (argument_list.chip is not None):
88 self.chip_name = argument_list.chip
104 parser.add_argument("-chip", dest="chip")
|
| /Zephyr-latest/boards/atmel/sam0/samc21n_xpro/doc/ |
| D | index.rst | 38 - on-chip
41 - on-chip
44 - on-chip
47 - on-chip
50 - on-chip
53 - on-chip
56 - on-chip
59 - on-chip
62 - on-chip
65 - on-chip
[all …]
|
| /Zephyr-latest/boards/atmel/sam0/samd21_xpro/doc/ |
| D | index.rst | 36 - on-chip
39 - on-chip
42 - on-chip
45 - on-chip
48 - on-chip
51 - on-chip
54 - on-chip
57 - on-chip
60 - on-chip
63 - on-chip
[all …]
|
| /Zephyr-latest/soc/raspberrypi/rpi_pico/rp2040/ |
| D | Kconfig | 30 Configure RP2 to use a W25Q080 flash chip, or similar. Should be selected
36 Configure RP2 to use a flash chip supporting the standard 03h command.
42 Configure RP2 to use a IS25LP080 flash chip, or similar. Should be selected
48 Configure RP2 to use a W25X10CL flash chip, or similar. Should be selected
54 Configure RP2 to use a AT25SF128A flash chip, or similar. Should be selected
|
| /Zephyr-latest/drivers/gpio/ |
| D | Kconfig.mcp23xxx | 13 bool "MCP230XX I2C-based GPIO chip"
23 Enable driver for MCP230XX I2C-based GPIO chip.
36 bool "MCP23SXX SPI-based GPIO chip"
45 Enable driver for MCP23SXX SPI-based GPIO chip.
|
| /Zephyr-latest/boards/atmel/sam0/saml21_xpro/doc/ |
| D | index.rst | 36 - on-chip
39 - on-chip
42 - on-chip
45 - on-chip
48 - on-chip
51 - on-chip
54 - on-chip
57 - on-chip
60 - on-chip
63 - on-chip
[all …]
|
| /Zephyr-latest/dts/bindings/spi/ |
| D | intel,penwell-spi.yaml | 22 Chip select configuration. possible values:
31 Use GSPI chip select CS0 or CS1. GSPI 0, 1 & 2 instance supports both chip selects.
33 Chip select output possible values:
|
| /Zephyr-latest/boards/atmel/sam0/samr34_xpro/doc/ |
| D | index.rst | 41 - on-chip
44 - on-chip
47 - on-chip
50 - on-chip
53 - on-chip
56 - on-chip
59 - on-chip
62 - on-chip
65 - on-chip
68 - on-chip
[all …]
|
| /Zephyr-latest/boards/seeed/wio_terminal/doc/ |
| D | index.rst | 45 - on-chip
48 - on-chip
51 - on-chip
54 - on-chip
57 - on-chip
60 - on-chip
63 - on-chip
66 - on-chip
69 - on-chip
72 - on-chip
[all …]
|
| /Zephyr-latest/boards/atmel/sam/sam_e70_xplained/doc/ |
| D | index.rst | 36 | NVIC | on-chip | nested vector interrupt controller |
38 | SYSTICK | on-chip | systick |
40 | AFEC | on-chip | adc |
42 | CAN FD | on-chip | can |
44 | COUNTER | on-chip | counter |
46 | ETHERNET | on-chip | ethernet |
48 | GPIO | on-chip | gpio |
50 | DAC | on-chip | dac |
52 | HWINFO | on-chip | Unique device serial number |
54 | I2C | on-chip | i2c |
[all …]
|
| /Zephyr-latest/boards/atmel/sam/sam_v71_xult/doc/ |
| D | index.rst | 42 | NVIC | on-chip | nested vector interrupt controller |
44 | SYSTICK | on-chip | systick |
46 | AFEC | on-chip | adc |
48 | CAN FD | on-chip | can |
50 | COUNTER | on-chip | counter |
52 | ETHERNET | on-chip | ethernet |
54 | GPIO | on-chip | gpio |
56 | DAC | on-chip | dac |
58 | HWINFO | on-chip | Unique device serial number |
60 | I2C | on-chip | i2c |
[all …]
|
| /Zephyr-latest/include/zephyr/devicetree/ |
| D | spi.h | 26 * @brief Does a SPI controller node have chip select GPIOs configured?
29 * chip select GPIOs. Its value is a phandle-array which specifies the
30 * chip select lines.
55 * @brief Number of chip select GPIOs in a SPI controller's cs-gpios property
83 * @brief Does a SPI device have a chip select line configured?
114 * @return 1 if spi_dev's bus node DT_BUS(spi_dev) has a chip select
120 * @brief Get a SPI device's chip select GPIO controller's node identifier
148 * @return node identifier for spi_dev's chip select GPIO controller
154 * @brief Get a SPI device's chip select GPIO pin number
181 * @return pin number of spi_dev's chip select GPIO
[all …]
|
| /Zephyr-latest/boards/01space/esp32c3_042_oled/doc/ |
| D | index.rst | 7 RISC-V WiFi/Bluetooth dual-mode chip.
22 * Onboard ceramic chip antenna
23 * On-chip USB-UART converter
31 The ESP32-C3 does not have native USB, it has an on-chip USB-serial converter
42 | PMP | on-chip | arch/riscv |
44 | INTMTRX | on-chip | intc_esp32c3 |
46 | PINMUX | on-chip | pinctrl_esp32 |
48 | USB UART | on-chip | serial_esp32_usb |
50 | GPIO | on-chip | gpio_esp32 |
52 | UART | on-chip | uart_esp32 |
[all …]
|
| /Zephyr-latest/dts/bindings/gpio/ |
| D | richtek,rt1718s.yaml | 5 Richtek RT1718S TCPC chip
7 The Richtek RT1718S chip is TCPC, but also has 3 pins, which can be used as
8 a usual GPIO. This node collects common properties for RT1718S chip e.g. I2C
36 description: Interrupt GPIO pin connected from the chip(IRQB)
|
| /Zephyr-latest/boards/nxp/frdm_rw612/doc/ |
| D | index.rst | 11 The RW612 MCU subsystem includes 1.2 MB of on-chip SRAM and a high-bandwidth Quad SPI interface
12 with an on-the-fly decryption engine for securely accessing off-chip XIP flash.
21 - 1.2 MB on-chip SRAM
29 | NVIC | on-chip | nested vector interrupt controller|
31 | SYSTICK | on-chip | systick |
33 | MCI_IOMUX | on-chip | pinmux |
35 | GPIO | on-chip | gpio |
37 | USART | on-chip | serial |
39 | DMA | on-chip | dma |
41 | SPI | on-chip | spi |
[all …]
|
| /Zephyr-latest/boards/ene/kb1200_evb/doc/ |
| D | index.rst | 32 | NVIC | on-chip | nested vector interrupt controller |
34 | ADC | on-chip | adc controller |
36 | CLOCK | on-chip | reset and clock control |
38 | GPIO | on-chip | gpio |
40 | I2C | on-chip | i2c port/controller |
42 | PINMUX | on-chip | pinmux |
44 | PMU | on-chip | power management |
46 | PSL | on-chip | power switch logic |
48 | PWM | on-chip | pulse width modulator |
50 | TACH | on-chip | tachometer sensor |
[all …]
|
| /Zephyr-latest/boards/infineon/xmc45_relax_kit/doc/ |
| D | index.rst | 32 | NVIC | on-chip | nested vectored |
35 | SYSTICK | on-chip | system clock |
37 | UART | on-chip | serial port |
39 | SPI | on-chip | spi |
41 | GPIO | on-chip | gpio |
43 | FLASH | on-chip | flash |
45 | ADC | on-chip | adc |
47 | DMA | on-chip | dma |
49 | PWM | on-chip | pwm |
51 | WATCHDOG | on-chip | watchdog |
[all …]
|
| /Zephyr-latest/boards/infineon/xmc47_relax_kit/doc/ |
| D | index.rst | 35 | NVIC | on-chip | nested vectored |
38 | SYSTICK | on-chip | system clock |
40 | UART | on-chip | serial port |
42 | SPI | on-chip | spi |
44 | GPIO | on-chip | gpio |
46 | FLASH | on-chip | flash |
48 | ADC | on-chip | adc |
50 | DMA | on-chip | dma |
52 | PWM | on-chip | pwm |
54 | WATCHDOG | on-chip | watchdog |
[all …]
|
