Searched full:cs1 (Results 1 – 17 of 17) sorted by relevance
51 Use QMSPI CS0# or CS1#. Port 0 supports both chip selects.82 cs1-freq:85 Allows different frequencies for CS#0 and CS1# devices. This applies86 to ports implementing CS1#.
31 Use GSPI chip select CS0 or CS1. GSPI 0, 1 & 2 instance supports both chip selects.35 1: CS1
35 cs1-pin:
43 description: Use QMSPI CS0# or CS1#
167 /* SAF CS0/CS1 Opcode A registers */180 /* SAF CS0/CS1 Opcode B registers */193 /* SAF CS0/CS1 Opcode C registers */206 /* SAF CS0/CS1 registers */449 /* SAF Flash CS0/CS1 Configuration Poll2 Mask registers */500 /* SAF Config CS0 and CS1 Opcode registers */519 /* SAF Clock Divider CS0 and CS1 registers */
267 /* Copy QMSPI frequency divider into SAF CS0 and CS1 QMSPI frequency in saf_qmspi_init()268 * dividers. SAF HW uses CS0/CS1 divider register fields to overwrite in saf_qmspi_init()270 * SAF CS0/CS1 SPI frequency dividers based on flash configuration. in saf_qmspi_init()480 LOG_ERR("%s SAF CLKDIV CS1 bad freq MHz %u", in saf_flash_freq_cfg()502 * CS0 OpA @ 0x4c or CS1 OpA @ 0x5C503 * CS0 OpB @ 0x50 or CS1 OpB @ 0x60504 * CS0 OpC @ 0x54 or CS1 OpC @ 0x64507 * CS0: QMSPI descriptors 0-5 or CS1 QMSPI descriptors 6-11508 * CS0 Descrs @ 0x58 or CS1 Descrs @ 0x68510 * SAF CS1 QMSPI frequency dividers (read/all other) commands[all …]
384 * CS0 OpA @ 0x4c or CS1 OpA @ 0x5C385 * CS0 OpB @ 0x50 or CS1 OpB @ 0x60386 * CS0 OpC @ 0x54 or CS1 OpC @ 0x64389 * CS0: QMSPI descriptors 0-5 or CS1 QMSPI descriptors 6-11390 * CS0 Descrs @ 0x58 or CS1 Descrs @ 0x68491 /* optional second flash device connected to CS1 */ in espi_saf_xec_configuration()496 /* Program CS1 configuration (same as CS0 if only one device) */ in espi_saf_xec_configuration()
40 6 IRQ/GPIO3 9 10 SPI(CS1)/GPIO4 7
183 cs1-pin = "0";195 cs1-pin = "0";
137 * SAF Flash Config CS0/CS1 QMSPI descriptor indices register value282 /* SAF Flash Config CS1 QMSPI descriptor indices */
123 - SERCOM5 GPIO CS1 : PA14
161 * SAF Flash Config CS0/CS1 QMSPI descriptor indices register value365 /* SAF Flash Config CS1 QMSPI descriptor indices */
167 /* Enable chip select output CS0/CS1 */ in spi_pw_cs_ctrl_init()172 /* Set chip select CS1 */ in spi_pw_cs_ctrl_init()
91 /* loop through all cs pins: cs0, cs1 and cs2 */ in spi_b91_config_cs()
406 /* CS1 alternate mode (frequency) */ in qmspi_configure()
33 /omit-if-no-ref/ ext_flash_cs1_gpa6: periph-ext-spi-flash-cs1 {
43 /omit-if-no-ref/ ext_flash_cs1_sl: periph-ext-spi-flash-cs1 {
