| /Zephyr-latest/include/zephyr/sys/ |
| D | crc.h | 12 * @brief CRC computation function
34 /* Initial value expected to be used at the beginning of the OpenPGP CRC-24 computation. */
37 * The CRC-24 value is stored on a 32-bit value, only the 3 least significant bytes
38 * are meaningful. Use the following mask to only keep the CRC-24 value.
48 * @defgroup crc CRC
54 * @brief CRC algorithm enumeration
56 * These values should be used with the @ref crc dispatch function.
75 * @brief Generic function for computing a CRC-16 without input or output
78 * Compute CRC-16 by passing in the address of the input, the input length
82 * @note If you are planning to use a CRC based on poly 0x1012 the functions
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| /Zephyr-latest/lib/crc/ |
| D | crc32c_sw.c | 7 #include <zephyr/sys/crc.h>
9 /* crc table generated from polynomial 0x1EDC6F41UL (Castagnoli) */
17 /* This value needs to be XORed with the final crc value once crc for
27 uint32_t crc32_c(uint32_t crc, const uint8_t *data, in crc32_c() argument
31 crc = CRC32C_INIT; in crc32_c()
35 crc = crc32c_table[(crc ^ data[i]) & 0x0F] ^ (crc >> 4); in crc32_c()
36 crc = crc32c_table[(crc ^ ((uint32_t)data[i] >> 4)) & 0x0F] ^ (crc >> 4); in crc32_c()
39 return last_pkt ? (crc ^ CRC32C_XOR_OUT) : crc; in crc32_c()
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| D | crc32_sw.c | 7 #include <zephyr/sys/crc.h>
14 uint32_t crc32_ieee_update(uint32_t crc, const uint8_t *data, size_t len) in crc32_ieee_update() argument
16 /* crc table generated from polynomial 0xedb88320 */ in crc32_ieee_update()
24 crc = ~crc; in crc32_ieee_update()
29 crc = (crc >> 4) ^ table[(crc ^ byte) & 0x0f]; in crc32_ieee_update()
30 crc = (crc >> 4) ^ table[(crc ^ ((uint32_t)byte >> 4)) & 0x0f]; in crc32_ieee_update()
33 return (~crc); in crc32_ieee_update()
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| D | crc16_sw.c | 7 #include <zephyr/sys/crc.h>
11 uint16_t crc = seed; in crc16() local
15 crc ^= (uint16_t)(src[i] << 8U); in crc16()
18 if (crc & 0x8000UL) { in crc16()
19 crc = (crc << 1U) ^ poly; in crc16()
21 crc = crc << 1U; in crc16()
27 return crc; in crc16()
32 uint16_t crc = seed; in crc16_reflect() local
36 crc ^= (uint16_t)src[i]; in crc16_reflect()
39 if (crc & 0x0001UL) { in crc16_reflect()
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| D | Kconfig | 4 config CRC config
5 bool "Cyclic redundancy check (CRC) Support"
7 Enable use of CRC.
9 if CRC
11 bool "CRC Shell"
15 Enable CRC checking for memory regions from the shell.
16 endif # CRC
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| D | crc4_sw.c | 7 #include <zephyr/sys/crc.h>
12 uint8_t crc = initial_value; in crc4() local
17 crc ^= ((src[i] >> (4 * (1 - j))) & 0xf); in crc4()
21 if (crc & 0x01) { in crc4()
22 crc = (crc >> 1) ^ polynomial; in crc4()
24 crc >>= 1; in crc4()
27 if (crc & 0x8) { in crc4()
28 crc = (crc << 1) ^ polynomial; in crc4()
30 crc <<= 1; in crc4()
37 return crc & 0xF; in crc4()
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| D | crc24_sw.c | 7 #include <zephyr/sys/crc.h>
16 /* CRC-24 implementation from the section 6.1 of the RFC 4880 */
17 uint32_t crc24_pgp_update(uint32_t crc, const uint8_t *data, size_t len) in crc24_pgp_update() argument
22 crc ^= (*data++) << 16; in crc24_pgp_update()
24 crc <<= 1; in crc24_pgp_update()
25 if (crc & 0x01000000) { in crc24_pgp_update()
26 crc ^= CRC24_PGP_POLY; in crc24_pgp_update()
31 return crc; in crc24_pgp_update()
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| D | crc8_sw.c | 9 #include <zephyr/sys/crc.h>
50 uint8_t crc = initial_value; in crc8() local
54 crc ^= src[i]; in crc8()
58 if ((crc & 0x01) != 0) { in crc8()
59 crc = (crc >> 1) ^ polynomial; in crc8()
61 crc >>= 1; in crc8()
64 if ((crc & 0x80) != 0) { in crc8()
65 crc = (crc << 1) ^ polynomial; in crc8()
67 crc <<= 1; in crc8()
73 return crc; in crc8()
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| /Zephyr-latest/tests/unit/crc/ |
| D | main.c | 8 #include <zephyr/sys/crc.h>
9 #include "../../../lib/crc/crc8_sw.c"
10 #include "../../../lib/crc/crc16_sw.c"
11 #include "../../../lib/crc/crc32_sw.c"
12 #include "../../../lib/crc/crc32c_sw.c"
13 #include "../../../lib/crc/crc7_sw.c"
14 #include "../../../lib/crc/crc24_sw.c"
16 ZTEST(crc, test_crc32c) in ZTEST() argument
31 * of one big stream whose CRC needs to be calculated. Note that the in ZTEST()
32 * CRC of the first string is passed over to the second crc calculation, in ZTEST()
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| D | testcase.yaml | 2 utilities.crc:
4 - crc
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| /Zephyr-latest/modules/littlefs/ |
| D | zephyr_lfs_crc.c | 9 /* Use the LFS naive CRC implementation until it has been decided which CRC to
13 /* Software CRC implementation with small lookup table */
14 uint32_t lfs_crc(uint32_t crc, const void *buffer, size_t size) in lfs_crc() argument
26 crc = (crc >> 4) ^ rtable[(crc ^ (data[i] >> 0)) & 0xf]; in lfs_crc()
27 crc = (crc >> 4) ^ rtable[(crc ^ (data[i] >> 4)) & 0xf]; in lfs_crc()
30 return crc; in lfs_crc()
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| /Zephyr-latest/samples/boards/nordic/system_off/src/ |
| D | retained.c | 16 #include <zephyr/sys/crc.h>
26 #define RETAINED_CRC_OFFSET offsetof(struct retained_data, crc)
27 #define RETAINED_CHECKED_SIZE (RETAINED_CRC_OFFSET + sizeof(retained.crc))
36 /* The residue of a CRC is what you get from the CRC over the in retained_validate()
37 * message catenated with its CRC. This is the post-final-xor in retained_validate()
38 * residue for CRC-32 (CRC-32/ISO-HDLC) which Zephyr calls in retained_validate()
42 uint32_t crc = crc32_ieee((const uint8_t *)&retained, in retained_validate() local
44 bool valid = (crc == residue); in retained_validate()
46 /* If the CRC isn't valid, reset the retained data. */ in retained_validate()
66 uint32_t crc = crc32_ieee((const uint8_t *)&retained, in retained_update() local
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| /Zephyr-latest/tests/net/lib/lwm2m/interop/src/ |
| D | firmware_update.c | 13 #include <zephyr/sys/crc.h>
17 static uint32_t crc; variable
25 LOG_INF("UPDATE, (CRC %u)", crc); in firmware_update_cb()
45 crc = crc32_ieee(data, data_len); in firmware_block_received_cb()
47 crc = crc32_ieee_update(crc, data, data_len); in firmware_block_received_cb()
49 LOG_INF("FIRMWARE: BLOCK RECEIVED: offset:%zd len:%u last_block:%d crc: %u", in firmware_block_received_cb()
50 offset, data_len, last_block, crc); in firmware_block_received_cb()
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| /Zephyr-latest/samples/arch/smp/pktqueue/src/ |
| D | main.c | 24 /* CRC bytes in the packet */
66 /* leave crc field zeroed */ in init_datagram_queue()
73 /* Compute crc for further comparison */ in init_datagram_queue()
74 uint16_t crc; in init_datagram_queue() local
76 crc = crc16(POLYNOMIAL, 0x0000, in init_datagram_queue()
79 /* Save crc value in header[CRC_BYTE_1-CRC_BYTE_2] field */ in init_datagram_queue()
80 descriptors[queue_num][i].ptr[CRC_BYTE_1] = (uint8_t)(crc >> 8); in init_datagram_queue()
81 descriptors[queue_num][i].ptr[CRC_BYTE_2] = (uint8_t)(crc); in init_datagram_queue()
97 uint16_t crc, crc_orig; in test_thread() local
101 /* Store original crc value from header */ in test_thread()
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| /Zephyr-latest/tests/net/lib/lwm2m/interop/pytest/ |
| D | test_blockwise.py | 34 # Our Firmware object prints out the CRC of the received firmware
40 crc = int(re.search('CRC ([0-9]+)', line).group(1))
41 # Verify that CRC matches
42 assert crc == zlib.crc32(fw)
64 # Our Firmware object prints out the CRC of the received firmware
70 crc = int(re.search('CRC ([0-9]+)', line).group(1))
71 # Verify that CRC matches
72 assert crc == zlib.crc32(fw)
95 crc = int(lines[0])
96 assert crc == zlib.crc32(data)
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| /Zephyr-latest/subsys/mgmt/mcumgr/transport/src/ |
| D | serial_util.c | 12 #include <zephyr/sys/crc.h>
73 uint16_t crc; in mcumgr_serial_process_frag() local
132 crc = mcumgr_serial_calc_crc(rx_ctxt->nb->data, rx_ctxt->nb->len); in mcumgr_serial_process_frag()
133 if (crc != 0U) { in mcumgr_serial_process_frag()
138 /* Packet is complete; strip the CRC. */ in mcumgr_serial_process_frag()
167 * CRC.
179 uint16_t crc; in mcumgr_serial_tx_pkt() local
194 crc = mcumgr_serial_calc_crc(data, len); in mcumgr_serial_tx_pkt()
229 * in the two byte CRC. The frame can not be stretched and current logic does not in mcumgr_serial_tx_pkt()
230 * allow to send CRC separately so if CRC would not fit as a whole, shrink in mcumgr_serial_tx_pkt()
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| D | smp_dummy.c | 18 #include <zephyr/sys/crc.h>
362 uint16_t crc; in mcumgr_dummy_process_frag() local
417 crc = mcumgr_dummy_calc_crc(rx_ctxt->nb->data, rx_ctxt->nb->len); in mcumgr_dummy_process_frag()
418 if (crc != 0U) { in mcumgr_dummy_process_frag()
423 /* Packet is complete; strip the CRC. */ in mcumgr_dummy_process_frag()
447 uint16_t crc; in mcumgr_dummy_process_frag_outgoing() local
502 crc = mcumgr_dummy_calc_crc(tx_ctxt->nb->data, tx_ctxt->nb->len); in mcumgr_dummy_process_frag_outgoing()
503 if (crc != 0U) { in mcumgr_dummy_process_frag_outgoing()
508 /* Packet is complete; strip the CRC. */ in mcumgr_dummy_process_frag_outgoing()
538 * include a header or CRC.
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| /Zephyr-latest/subsys/fs/nvs/ |
| D | Kconfig | 9 select CRC
33 bool "Non-volatile Storage CRC protection on the data"
35 Enable a CRC-32 on the data part of each NVS element.
36 The ATE CRC is not impacted by this feature and stays the same.
37 The CRC-32 is transparently stored at the end of the data field,
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| /Zephyr-latest/drivers/sensor/tdk/icp10125/ |
| D | Kconfig | 17 bool "Check the CRC of measument data"
18 imply CRC
21 Verify the CRC checksum that appended to the measurement data.
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| /Zephyr-latest/drivers/sensor/aosong/dht20/ |
| D | Kconfig | 20 bool "Use CRC error detection"
22 select CRC
24 Verify CRC byte in RX data
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| /Zephyr-latest/drivers/sensor/ti/tmag5170/ |
| D | Kconfig | 45 bool "Use CRC error detection"
47 select CRC
49 Verify CRC of RX data and append CRC to TX data
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| /Zephyr-latest/drivers/fpga/ |
| D | fpga_ice40_spi.c | 13 #include <zephyr/sys/crc.h>
23 uint32_t crc; in fpga_ice40_load() local
43 /* crc check */ in fpga_ice40_load()
44 crc = crc32_ieee((uint8_t *)image_ptr, img_size); in fpga_ice40_load()
45 if (data->loaded && crc == data->crc) { in fpga_ice40_load()
46 LOG_WRN("already loaded with image CRC32c: 0x%08x", data->crc); in fpga_ice40_load()
51 /* clear crc */ in fpga_ice40_load()
52 data->crc = 0; in fpga_ice40_load()
157 fpga_ice40_crc_to_str(crc, data->info); in fpga_ice40_load()
158 LOG_INF("Loaded image with CRC32 0x%08x", crc); in fpga_ice40_load()
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| D | fpga_ice40_common.c | 15 void fpga_ice40_crc_to_str(uint32_t crc, char *s) in fpga_ice40_crc_to_str() argument
22 for (i = 0; i < sizeof(crc) * NIBBLES_PER_BYTE; ++i, crc >>= BITS_PER_NIBBLE) { in fpga_ice40_crc_to_str()
23 nibble = crc & GENMASK(BITS_PER_NIBBLE, 0); in fpga_ice40_crc_to_str()
25 s[sizeof(crc) * NIBBLES_PER_BYTE - i - 1] = ch; in fpga_ice40_crc_to_str()
28 s[sizeof(crc) * NIBBLES_PER_BYTE] = '\0'; in fpga_ice40_crc_to_str()
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| /Zephyr-latest/soc/nuvoton/npcx/common/ecst/ |
| D | ecst.py | 436 print(f'- HDR - FW CRC Enabled - Offset '
561 """writes the fw crc start address and the crc size to the output file.
563 --crc start address should be 4 byte aligned, bigger than crc end address
564 --crc size should be 4 byte aligned, and be set to firmware length minus
565 crc start offset by default
566 --crc end address is crc start address + crc size bytes
579 # default value for crc size
591 message = f'Firmware crc offset address ' \
596 message = f'CRC start address ({fw_crc_start_to_print}) should' \
597 f' be less or equal to CRC end address ({fw_crc_end_to_print}) \n'
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| /Zephyr-latest/drivers/sensor/aosong/ags10/ |
| D | ags10.c | 13 #include <zephyr/sys/crc.h>
19 #define AGS10_MAX_PAYLOAD_SIZE 5U /* Payload will be max 4 bytes + CRC (datasheet 3.1) */
54 /* If CRC is valid and data is valid too */ in ags10_sample_fetch()
62 LOG_WRN("Bad CRC or data not ready"); in ags10_sample_fetch()
101 /* Read firmware version and check CRC */ in ags10_init()
106 /* Bytes 0 to 2 are reserved, byte 3 is version, byte 4 is CRC */ in ags10_init()
114 LOG_WRN("Bad CRC"); in ags10_init()
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