Home
last modified time | relevance | path

Searched full:clkrc (Results 1 – 3 of 3) sorted by relevance

/Zephyr-latest/drivers/video/
Dov7725.c190 uint8_t clkrc; /*!< Register CLKRC. */ member
207 .clkrc = 0x01, .com4 = 0x41, .dm_lnl = 0x00 },
209 .clkrc = 0x03, .com4 = 0x41, .dm_lnl = 0x00 },
211 .clkrc = 0x01, .com4 = 0x41, .dm_lnl = 0x66 },
213 .clkrc = 0x03, .com4 = 0x41, .dm_lnl = 0x1a },
215 .clkrc = 0x01, .com4 = 0x41, .dm_lnl = 0x2b },
217 .clkrc = 0x03, .com4 = 0x41, .dm_lnl = 0x2b },
219 .clkrc = 0x01, .com4 = 0x41, .dm_lnl = 0x99 },
221 .clkrc = 0x03, .com4 = 0x41, .dm_lnl = 0x46 },
223 .clkrc = 0x00, .com4 = 0x41, .dm_lnl = 0x2b },
[all …]
Dov2640.c85 #define CLKRC 0x11 macro
169 { CLKRC, 0x80 }, /* Set PCLK divider */
825 /* Set CLKRC */ in ov2640_set_resolution()
827 ret |= ov2640_write_reg(&cfg->i2c, CLKRC, cfg->clock_rate_control); in ov2640_set_resolution()
/Zephyr-latest/dts/bindings/video/
Dovti,ov2640.yaml27 CLK = XVCLK /(decimal value of CLKRC[5:0] + 1)