Searched full:bypass (Results 1 – 25 of 143) sorted by relevance
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| /Zephyr-Core-3.5.0/soc/arm/st_stm32/common/ |
| D | Kconfig.soc | 52 bool "External SMPS 1.8V supply and bypass"
56 bool "External SMPS 2.5V supply and bypass"
60 bool "Bypass"
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| /Zephyr-Core-3.5.0/dts/bindings/clock/ |
| D | st,stm32-hse-clock.yaml | 11 hse-bypass:
14 HSE crystal oscillator bypass
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| D | st,stm32-lse-clock.yaml | 24 lse-bypass:
27 LSE crystal oscillator bypass
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| D | microchip,xec-pcr.yaml | 79 clkmon-bypass:
81 description: Bypass clkmon check of crystal or XTAL2 single-ended clock.
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| /Zephyr-Core-3.5.0/samples/subsys/zbus/runtime_obs_registration/ |
| D | README.rst | 11 …onds, the filter is disabled, and the filter bypass is enabled. At last, 5 seconds later, the filt…
48 I: Bypass filter
59 I: Disable bypass filter
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| D | sample.yaml | 17 - "I: Bypass filter"
18 - "I: Disable bypass filter"
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| /Zephyr-Core-3.5.0/samples/subsys/shell/shell_module/src/ |
| D | main.c | 292 static int set_bypass(const struct shell *sh, shell_bypass_cb_t bypass) in set_bypass() argument
296 if (bypass && in_use) { in set_bypass()
297 shell_error(sh, "Sample supports setting bypass on single instance."); in set_bypass()
304 shell_print(sh, "Bypass started, press ctrl-x ctrl-q to escape"); in set_bypass()
308 shell_set_bypass(sh, bypass); in set_bypass()
334 shell_print(sh, "Exit bypass"); in bypass_cb()
396 SHELL_CMD_ARG_REGISTER(bypass, NULL, "Bypass shell", cmd_bypass, 1, 0);
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| /Zephyr-Core-3.5.0/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices/boards/ |
| D | f4_i2s2_pll.overlay | 13 /delete-property/ hse-bypass;
52 hse-bypass;
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| /Zephyr-Core-3.5.0/samples/subsys/zbus/runtime_obs_registration/src/ |
| D | main.c | 57 LOG_INF("Bypass filter"); in main()
62 LOG_INF("Disable bypass filter"); in main()
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| /Zephyr-Core-3.5.0/soc/riscv/riscv-privileged/sifive-freedom/ |
| D | fe310_clock.c | 22 * - 16 MHz (bypass HFPLL). in fe310_clock_init()
33 /* Bypass HFPLL. */ in fe310_clock_init()
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| /Zephyr-Core-3.5.0/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/ |
| D | hse_8.overlay | 13 hse-bypass;
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| D | hse_8_bypass.overlay | 13 hse-bypass;
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| D | f0_f3_pll_32_hse_8.overlay | 13 hse-bypass;
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| D | f1_pll_64_hse_8.overlay | 13 hse-bypass;
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| D | pll_32_hse_8.overlay | 13 hse-bypass;
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| D | clear_f0_f1_f3_clocks.overlay | 14 /delete-property/ hse-bypass;
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| D | f2_f4_f7_pll_64_hse_8.overlay | 13 hse-bypass;
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| D | pll_64_hse_8.overlay | 13 hse-bypass;
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| D | clear_f2_f4_f7_clocks.overlay | 14 /delete-property/ hse-bypass;
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| /Zephyr-Core-3.5.0/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/boards/ |
| D | core_init.overlay | 19 /delete-property/ hse-bypass;
92 hse-bypass;
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| D | spi1_per_ck_hse.overlay | 14 hse-bypass;
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| /Zephyr-Core-3.5.0/tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core/boards/ |
| D | hse_8.overlay | 13 hse-bypass;
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| /Zephyr-Core-3.5.0/dts/bindings/ospi/ |
| D | st,stm32-ospi.yaml | 73 dlyb-bypass:
76 Enables Delay Block (DLYB) Bypass.
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| /Zephyr-Core-3.5.0/tests/drivers/clock_control/stm32_clock_configuration/stm32u5_core/boards/ |
| D | hse_16.overlay | 20 hse-bypass;
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| /Zephyr-Core-3.5.0/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/boards/ |
| D | hse25.overlay | 20 hse-bypass; /* X3 is a 25MHz oscillator on PH0 */
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