Searched full:avdd (Results 1 – 9 of 9) sorted by relevance
55 bias voltage level: 0 - (AVDD+AVSS)/2, 1 - (AVDD+AVSS)/12
10 3 DVP_SDA (4) AVDD-2V8
12 8 AVDD SCL 7
68 /** AVDD 1.8V reference */
25 | 4 | AVDD |
402 * set common mode voltage to 1.65V (half of AVDD) in codec_configure_output()403 * AVDD is typically 3.3V in codec_configure_output()
79 /* AVDD: 5.2V */81 /* AVDD: Ratio */
50 /* avdd +5.2v,avee-5.2v */
35 | 8 | AVDD |
