Searched full:arc (Results 1 – 25 of 306) sorted by relevance
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/Zephyr-Core-3.7.0/arch/arc/ |
D | Kconfig | 1 # ARC options 6 menu "ARC Options" 7 depends on ARC 10 default "arc" 16 This option signifies the use of an ARC EM CPU 23 This option signifies the use of an ARC HS CPU 27 prompt "ARC Instruction Set" 31 bool "ARC ISA v2" 38 v2 ISA for the ARC-HS & ARC-EM cores 41 bool "ARC ISA v3" [all …]
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/Zephyr-Core-3.7.0/boards/snps/emsdp/ |
D | Kconfig.emsdp | 1 # DesignWare ARC EM Software Development Platform board configuration 16 The ARC EM Software Development Platform (emsdp) is an FPGA based 17 development platform intended to support ARC licenses in developing 18 their software for the ARC EM processor family and ARC EM Subsystems. 19 It has the support for ARC EM4, EM5D, EM6, EM7D, EM9D and EM11D 20 processors. ARC EM Enhanced Security Package (ESP) and ARC EM
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/Zephyr-Core-3.7.0/soc/snps/emsdp/ |
D | Kconfig.soc | 11 Synopsys ARC EM4 of EMSDP 17 Synopsys ARC EM5D of EMSDP 23 Synopsys ARC EM6 of EMSDP 29 Synopsys ARC EM7D of EMSDP 35 Synopsys ARC EM7D+ESP of EMSDP 41 Synopsys ARC EM9D of EMSDP 47 Synopsys ARC EM11D of EMSDP
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/Zephyr-Core-3.7.0/arch/arc/core/mpu/ |
D | Kconfig | 7 int "ARC MPU version" 11 ARC MPU has several versions. For MPU v2, the minimum region is 2048 bytes; 16 bool "ARC Core MPU functionalities" 18 ARC core MPU functionalities 24 Enable thread stack guards via MPU. ARC supports built-in stack protection. 30 bool "ARC MPU Support" 41 Target has ARC MPU
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/Zephyr-Core-3.7.0/doc/develop/toolchains/ |
D | designware_arc_mwdt.rst | 3 DesignWare ARC MetaWare Development Toolkit (MWDT) 6 #. You need to have `ARC MWDT <https://www.synopsys.com/dw/ipdir.php?ds=sw_metaware>`_ installed on 13 Even though ARC MWDT toolchain is used for Zephyr RTOS build, still the GNU preprocessor & GNU 15 generation. We used Zephyr SDK as a source of these ARC GNU tools as well. 16 … To setup ARC GNU toolchain please use SDK Bundle (Full or Minimal) instead of manual installation 28 If you have only one ARC MWDT toolchain version installed on your machine you may skip setting 41 /home/you/ARC/MWDT_2023.03/ 47 C:\ARC\MWDT_2023.03\
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/Zephyr-Core-3.7.0/boards/snps/hsdk4xd/ |
D | Kconfig.hsdk4xd | 1 # DesignWare ARC HSDK4XD Development Kit board configuration 9 The ARC HS4x/4xD Development Kit is a ready-to-use software development 10 platform for the ARC HS4x/4xD family of processor IP. It includes 11 a multicore ARC HS4x/HS4xD-based chip and integrates a wide range
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/Zephyr-Core-3.7.0/boards/snps/hsdk/ |
D | Kconfig.hsdk | 1 # DesignWare ARC HS Development Kit board configuration 9 The DesignWare ARC HS Development Kit is a ready-to-use platform for 10 rapid software development on the ARC HS3x family of processors. It 11 supports single- and multi-core ARC HS34, HS36 and HS38 processors
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/Zephyr-Core-3.7.0/soc/snps/emsk/ |
D | Kconfig.soc | 8 Synopsys ARC EM Starter Kit SoC 14 Synopsys ARC EM7D of EMSK 20 Synopsys ARC EM9D of EMSK 26 Synopsys ARC EM11D of EMSK
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/Zephyr-Core-3.7.0/drivers/timer/ |
D | Kconfig.arcv2 | 7 bool "ARC Timer" 9 depends on ARC 16 int "ARC timer interrupt priority" 20 This option specifies the IRQ priority used by the ARC timer. Lower
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/Zephyr-Core-3.7.0/boards/snps/nsim/arc_v/ |
D | board.cmake | 8 board_set_flasher_ifnset(arc-nsim) 9 board_set_debugger_ifnset(arc-nsim) 12 board_runner_args(arc-nsim "--props=${NSIM_PROPS}") 14 board_finalize_runner_args(arc-nsim)
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/Zephyr-Core-3.7.0/arch/arc/core/dsp/ |
D | Kconfig | 6 menu "ARC DSP Options" 30 bool "ARC complex DSP operation" 39 bool "ARC address generation unit registers" 45 bool "ARC address generation unit register sharing" 56 bool "ARC AGU medium size register" 63 bool "ARC AGU large size register"
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/Zephyr-Core-3.7.0/boards/snps/nsim/arc_classic/ |
D | Kconfig.nsim | 1 # DesignWare ARC nSIM simulated platform configuration 26 The DesignWare ARC nSIM board is a virtual board based on 27 the ARC nSIM simulator. It demonstrates the ARC core features
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D | board.cmake | 8 board_set_flasher_ifnset(arc-nsim) 9 board_set_debugger_ifnset(arc-nsim) 12 board_runner_args(arc-nsim "--props=${NSIM_PROPS}") 20 board_finalize_runner_args(arc-nsim)
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/Zephyr-Core-3.7.0/boards/snps/hsdk/support/ |
D | openocd.cfg | 30 # Contains quad-core ARC HS38. 33 source [find cpu/arc/hs.tcl] 40 set _CHIPNAME arc-em 54 # ARC HS38 core 2 66 $_TARGETNAME2 arc cache l2 auto 1 69 # ARC HS38 core 3 81 $_TARGETNAME3 arc cache l2 auto 1 84 # ARC HS38 core 4 97 $_TARGETNAME4 arc cache l2 auto 1 100 # ARC HS38 core 1 [all …]
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D | openocd-2-cores.cfg | 30 # Contains quad-core ARC HS38. 33 source [find cpu/arc/hs.tcl] 40 set _CHIPNAME arc-em 54 # ARC HS38 core 2 66 $_TARGETNAME2 arc cache l2 auto 1 69 # ARC HS38 core 1 81 $_TARGETNAME1 arc cache l2 auto 1
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/Zephyr-Core-3.7.0/boards/snps/hsdk4xd/support/ |
D | openocd.cfg | 30 # Contains quad-core ARC HS4x. 33 source [find cpu/arc/hs.tcl] 40 set _CHIPNAME arc-em 54 # ARC HS4x core 2 66 $_TARGETNAME2 arc cache l2 auto 1 69 # ARC HS4x core 3 81 $_TARGETNAME3 arc cache l2 auto 1 84 # ARC HS4x core 4 97 $_TARGETNAME4 arc cache l2 auto 1 100 # ARC HS4x core 1 [all …]
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/Zephyr-Core-3.7.0/boards/snps/nsim/arc_classic/doc/ |
D | index.rst | 3 DesignWare ARC nSIM and HAPS FPGA boards 9 This platform can be used to run Zephyr RTOS on the widest possible range of ARC processors in 10 simulation with `Designware ARC nSIM`_ or run same images on FPGA prototyping platform `HAPS`_. The 13 * ARC processor core, which implements ARCv2 or ARCv3 ISA, please refer to 14 :ref:`here <hardware_arch_arc_support_status>` for a complete list of ARC processor families which 18 ARC processors are known for being highly customizable and some but not all of the configurations 19 are currently supported in the Zephyr RTOS for ARC, again please refer to 25 * ``nsim/nsim_em`` - ARC EM core v4.0 with two register banks, FastIRQ's, MPUv2, DSP options and 27 * ``nsim/nsim_em7d_v22`` - ARC EM core v3.0 with one register bank and FastIRQ's 28 * ``nsim/nsim_em11d`` - ARC EM core v4.0 with one register bank, no FastIRQ's, MPUv2, DSP options a… [all …]
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/Zephyr-Core-3.7.0/include/zephyr/arch/arc/v2/ |
D | error.h | 11 * ARC-specific kernel error handling interface. Included by arc/arch.h. 17 #include <zephyr/arch/arc/syscall.h> 18 #include <zephyr/arch/arc/v2/exception.h>
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/Zephyr-Core-3.7.0/boards/snps/iotdk/doc/ |
D | index.rst | 3 DesignWare(R) ARC(R) IoT Development Kit 9 The DesignWare(R) ARC(R) IoT Development Kit is a versatile platform that 12 detection designs. The ARC IoT Development Kit includes a silicon 13 implementation of the ARC Data Fusion IP Subsystem running at 144 MHz on 19 :alt: DesignWare(R) ARC(R)IoT Development Kit (synopsys.com) 21 For details about the board, see: `ARC IoT Development Kit 28 For hardware feature details, refer to : `ARC IoT Development Kit 29 <https://embarc.org/project/arc-iot-development-kit/>`__ 54 Set up the ARC IoT Development Kit 79 ``iotdk`` as the board configuration, you can select the ARC IoT Development [all …]
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/Zephyr-Core-3.7.0/boards/snps/em_starterkit/ |
D | em_starterkit_emsk_em9d.dts | 31 compatible = "arc,iccm"; 36 compatible = "arc,dccm"; 41 compatible = "arc,xccm"; 46 compatible = "arc,yccm";
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D | em_starterkit_emsk_em11d.dts | 31 compatible = "arc,iccm"; 36 compatible = "arc,dccm"; 41 compatible = "arc,xccm"; 46 compatible = "arc,yccm";
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/Zephyr-Core-3.7.0/boards/snps/iotdk/ |
D | Kconfig.iotdk | 1 # DesignWare ARC IoT Development Kit board configuration 9 The DesignWare ARC IoT Development Kit board is a versatile platform that includes the 12 implementation of the ARC Data Fusion IP Subsystem running at 144 MHz on SMIC's 55-nm
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/Zephyr-Core-3.7.0/boards/snps/em_starterkit/doc/ |
D | index.rst | 3 DesignWare(R) ARC(R) EM Starter Kit 9 The DesignWare(R) ARC(R) EM Starter Kit is a low-cost, versatile solution 11 for the ARC EM Family of processors. The EM Family includes the EM4, EM6, 17 :alt: DesignWare(R) ARC(R) EM Starter Kit (synopsys.com) 19 The ARC EM Starter Kit consists of a hardware platform, including pre-installed 20 FPGA images of different ARC EM processor configurations with peripherals. 24 `Designware ARC EM Starter Kit website`_ . 48 The ARC EM Starter Kit main board has 6 Pmod connectors. These can be configured 124 * USB Cable (delivered as part of the ARC EM Starter Kit) 139 Set up the ARC EM Starter Kit [all …]
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/Zephyr-Core-3.7.0/include/zephyr/arch/arc/ |
D | arch.h | 9 * @brief ARC specific kernel interface header 11 * This header contains the ARC specific kernel interface. It is 22 #include <zephyr/arch/arc/thread.h> 26 #include <zephyr/arch/arc/v2/exception.h> 27 #include <zephyr/arch/arc/v2/irq.h> 28 #include <zephyr/arch/arc/v2/misc.h> 29 #include <zephyr/arch/arc/v2/aux_regs.h> 30 #include <zephyr/arch/arc/v2/arcv2_irq_unit.h> 31 #include <zephyr/arch/arc/v2/asm_inline.h> 32 #include <zephyr/arch/arc/arc_addr_types.h> [all …]
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/Zephyr-Core-3.7.0/dts/bindings/arc/ |
D | arc,dccm.yaml | 4 description: ARC DCCM 6 compatible: "arc,dccm"
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