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/Zephyr-Core-3.4.0/soc/arc/snps_nsim/
DKconfig5 prompt "ARC nSIM SoC Selection"
10 bool "Synopsys ARC EM in nSIM"
14 bool "Synopsys ARC EM7D_V22 in nSIM"
19 bool "Synopsys ARC EM11D in nSIM"
24 bool "Synopsys ARC SEM in nSIM"
30 bool "Synopsys ARC HS in nSIM"
35 bool "Multi-core Synopsys ARC HS in nSIM"
39 bool "Synopsys ARC HS with MPU v6 in nSIM"
44 bool "Synopsys ARC HS6x in nSIM"
47 bool "Multi-core Synopsys ARC HS6x in nSIM"
[all …]
DKconfig.defconfig12 source "soc/arc/snps_nsim/Kconfig.defconfig.em"
13 source "soc/arc/snps_nsim/Kconfig.defconfig.em11d"
14 source "soc/arc/snps_nsim/Kconfig.defconfig.em7d_v22"
15 source "soc/arc/snps_nsim/Kconfig.defconfig.sem"
16 source "soc/arc/snps_nsim/Kconfig.defconfig.hs"
17 source "soc/arc/snps_nsim/Kconfig.defconfig.hs_smp"
18 source "soc/arc/snps_nsim/Kconfig.defconfig.hs6x"
19 source "soc/arc/snps_nsim/Kconfig.defconfig.hs6x_smp"
20 source "soc/arc/snps_nsim/Kconfig.defconfig.hs_mpuv6"
21 source "soc/arc/snps_nsim/Kconfig.defconfig.hs5x"
[all …]
/Zephyr-Core-3.4.0/arch/arc/
DKconfig1 # ARC options
6 menu "ARC Options"
7 depends on ARC
10 default "arc"
17 This option signifies the use of an ARC EM CPU
23 This option signifies the use of an ARC HS CPU
27 prompt "ARC Instruction Set"
31 bool "ARC ISA v2"
38 v2 ISA for the ARC-HS & ARC-EM cores
41 bool "ARC ISA v3"
[all …]
/Zephyr-Core-3.4.0/boards/arc/emsdp/
DKconfig.board1 # DesignWare ARC EM Software Development Platform board configuration
10 The ARC EM Software Development Platform (emsdp) is an FPGA based
11 development platform intended to support ARC licenses in developing
12 their software for the ARC EM processor family and ARC EM Subsystems.
13 It has the support for ARC EM4, EM5D, EM6, EM7D, EM9D and EM11D
14 processors. ARC EM Enhanced Security Package (ESP) and ARC EM
/Zephyr-Core-3.4.0/soc/arc/snps_emsdp/
DKconfig5 prompt "ARC EM Software Development Platform Core Selection"
10 bool "Synopsys ARC EM4 of EMSDP"
14 bool "Synopsys ARC EM6 of EMSDP"
18 bool "Synopsys ARC EM5D of EMSDP"
23 bool "Synopsys ARC EM7D of EMSDP"
28 bool "Synopsys ARC EM7D+ESP of EMSDP"
34 bool "Synopsys ARC EM9D of EMSDP"
39 bool "Synopsys ARC EM11D of EMSDP"
DKconfig.defconfig14 source "soc/arc/snps_emsdp/Kconfig.defconfig.em4"
15 source "soc/arc/snps_emsdp/Kconfig.defconfig.em5d"
16 source "soc/arc/snps_emsdp/Kconfig.defconfig.em6"
17 source "soc/arc/snps_emsdp/Kconfig.defconfig.em7d"
18 source "soc/arc/snps_emsdp/Kconfig.defconfig.em7d_esp"
19 source "soc/arc/snps_emsdp/Kconfig.defconfig.em9d"
20 source "soc/arc/snps_emsdp/Kconfig.defconfig.em11d"
/Zephyr-Core-3.4.0/doc/develop/toolchains/
Ddesignware_arc_mwdt.rst3 DesignWare ARC MetaWare Development Toolkit (MWDT)
6 #. You need to have `ARC MWDT
19 Even though ARC MWDT compiler is used for Zephyr RTOS sources compilation, still the GNU
21 file generation. Hence we need to have either ARC or host GNU tools in :envvar:`PATH`.
24 * objcopy binaries: ``arc-elf32-objcopy`` or ``arc-linux-objcopy`` or ``objcopy``
25 * gcc binaries: ``arc-elf32-gcc`` or ``arc-linux-gcc`` or ``gcc``
39 /home/you/ARC/MWDT_2019.12/
45 C:\ARC\MWDT_2019.12\
/Zephyr-Core-3.4.0/soc/arc/snps_qemu/
DKconfig5 prompt "ARC QEMU SoC Selection"
10 bool "Synopsys ARC EM in QEMU"
13 bool "Synopsys ARC HS in QEMU"
16 bool "Synopsys ARC HS6x in QEMU"
19 bool "Synopsys ARC HS5x in QEMU"
DKconfig.defconfig26 # Technically ARC HS supports MPUv3, but not v2. But given MPUv3
33 source "soc/arc/snps_qemu/Kconfig.defconfig.em"
34 source "soc/arc/snps_qemu/Kconfig.defconfig.hs"
35 source "soc/arc/snps_qemu/Kconfig.defconfig.hs5x"
36 source "soc/arc/snps_qemu/Kconfig.defconfig.hs6x"
/Zephyr-Core-3.4.0/boards/arc/nsim/
DKconfig.board1 # DesignWare ARC nSIM simulated platform configuration
7 bool "ARC nSIM simulator"
11 The DesignWare ARC nSIM board is a virtual board based on
12 the ARC nSIM simulator. It demonstrates the ARC core features
Dboard.cmake5 board_set_flasher_ifnset(arc-nsim)
6 board_set_debugger_ifnset(arc-nsim)
9 board_runner_args(arc-nsim "--props=${NSIM_PROPS}")
17 board_finalize_runner_args(arc-nsim)
/Zephyr-Core-3.4.0/arch/arc/core/mpu/
DKconfig7 int "ARC MPU version"
11 ARC MPU has several versions. For MPU v2, the minimum region is 2048 bytes;
16 bool "ARC Core MPU functionalities"
18 ARC core MPU functionalities
24 Enable thread stack guards via MPU. ARC supports built-in stack protection.
30 bool "ARC MPU Support"
39 Target has ARC MPU
/Zephyr-Core-3.4.0/boards/arc/hsdk/
DKconfig.board1 # DesignWare ARC HS Development Kit board configuration
7 bool "ARC HS Development Kit"
10 The DesignWare ARC HS Development Kit is a ready-to-use platform for
11 rapid software development on the ARC HS3x family of processors. It
12 supports single- and multi-core ARC HS34, HS36 and HS38 processors
/Zephyr-Core-3.4.0/boards/arc/hsdk4xd/
DKconfig.board1 # DesignWare ARC HSDK4XD Development Kit board configuration
7 bool "ARC HSDK4XD Development Kit"
10 The ARC HS4x/4xD Development Kit is a ready-to-use software development
11 platform for the ARC HS4x/4xD family of processor IP. It includes
12 a multicore ARC HS4x/HS4xD-based chip and integrates a wide range
/Zephyr-Core-3.4.0/boards/arc/nsim/doc/
Dindex.rst3 DesignWare ARC nSIM and HAPS FPGA boards
9 This platform can be used to run Zephyr RTOS on the widest possible range of ARC processors in
10 simulation with `Designware ARC nSIM`_ or run same images on FPGA prototyping platform `HAPS`_. The
13 * ARC processor core, which implements ARCv2 or ARCv3 ISA, please refer to
14 :ref:`here <hardware_arch_arc_support_status>` for a complete list of ARC processor families which
18 ARC processors are known for being highly customizable and some but not all of the configurations
19 are currently supported in the Zephyr RTOS for ARC, again please refer to
25 * ``nsim_em`` - ARC EM core v4.0 with two register banks, FastIRQ's, MPUv2, DSP options and
27 * ``nsim_em_em7d_v22`` - ARC EM core v3.0 with one register bank and FastIRQ's
28 * ``nsim_em_em11d`` - ARC EM core v4.0 with one register bank, no FastIRQ's, MPUv2, DSP options and
[all …]
/Zephyr-Core-3.4.0/arch/arc/core/dsp/
DKconfig9 This option is enabled when the ARC CPU has hardware DSP unit.
11 menu "ARC DSP Options"
35 bool "ARC complex DSP operation"
44 bool "ARC address generation unit registers"
50 bool "ARC address generation unit register sharing"
61 bool "ARC AGU medium size register"
68 bool "ARC AGU large size register"
/Zephyr-Core-3.4.0/soc/arc/snps_emsk/
DKconfig6 prompt "ARC EM Starter Kit Core Selection"
11 bool "Synopsys ARC EM7D of EMSK"
15 bool "Synopsys ARC EM11D of EMSK"
19 bool "Synopsys ARC EM9D of EMSK"
DKconfig.defconfig10 source "soc/arc/snps_emsk/Kconfig.defconfig.em7d"
11 source "soc/arc/snps_emsk/Kconfig.defconfig.em11d"
12 source "soc/arc/snps_emsk/Kconfig.defconfig.em9d"
/Zephyr-Core-3.4.0/drivers/timer/
DKconfig.arcv27 bool "ARC Timer"
9 depends on ARC
16 int "ARC timer interrupt priority"
20 This option specifies the IRQ priority used by the ARC timer. Lower
/Zephyr-Core-3.4.0/boards/arc/iotdk/
DKconfig.board1 # DesignWare ARC IoT Development Kit board configuration
7 bool "ARC IoT Development Kit"
10 …ARC IoT Development Kit board is a versatile platform that includes the necessary hardware and sof…
/Zephyr-Core-3.4.0/boards/arc/hsdk/support/
Dopenocd.cfg30 # Contains quad-core ARC HS38.
33 source [find cpu/arc/hs.tcl]
40 set _CHIPNAME arc-em
54 # ARC HS38 core 2
66 $_TARGETNAME2 arc cache l2 auto 1
69 # ARC HS38 core 3
81 $_TARGETNAME3 arc cache l2 auto 1
84 # ARC HS38 core 4
97 $_TARGETNAME4 arc cache l2 auto 1
100 # ARC HS38 core 1
[all …]
Dopenocd-2-cores.cfg30 # Contains quad-core ARC HS38.
33 source [find cpu/arc/hs.tcl]
40 set _CHIPNAME arc-em
54 # ARC HS38 core 2
66 $_TARGETNAME2 arc cache l2 auto 1
69 # ARC HS38 core 1
81 $_TARGETNAME1 arc cache l2 auto 1
/Zephyr-Core-3.4.0/boards/arc/hsdk4xd/support/
Dopenocd.cfg30 # Contains quad-core ARC HS4x.
33 source [find cpu/arc/hs.tcl]
40 set _CHIPNAME arc-em
54 # ARC HS4x core 2
66 $_TARGETNAME2 arc cache l2 auto 1
69 # ARC HS4x core 3
81 $_TARGETNAME3 arc cache l2 auto 1
84 # ARC HS4x core 4
97 $_TARGETNAME4 arc cache l2 auto 1
100 # ARC HS4x core 1
[all …]
/Zephyr-Core-3.4.0/tests/subsys/mgmt/mcumgr/os_mgmt_info/
Dtestcase.yaml14 - arc
26 - arc
42 - arc
58 - arc
85 - arc
99 - arc
/Zephyr-Core-3.4.0/include/zephyr/arch/arc/v2/
Derror.h11 * ARC-specific kernel error handling interface. Included by arc/arch.h.
17 #include <zephyr/arch/arc/syscall.h>
18 #include <zephyr/arch/arc/v2/exc.h>

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