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/Zephyr-latest/subsys/logging/backends/
Dlog_backend_adsp_mtrace.c81 uint32_t w = slot->dsp_ptr; in mtrace_out() local
84 if (w > r) { in mtrace_out()
85 avail = MTRACE_LOG_BUF_SIZE - w + r - 1; in mtrace_out()
86 } else if (w == r) { in mtrace_out()
89 avail = r - w - 1; in mtrace_out()
100 if (w + out >= MTRACE_LOG_BUF_SIZE) { in mtrace_out()
101 size_t tail = MTRACE_LOG_BUF_SIZE - w; in mtrace_out()
104 memcpy(data + w, str, tail); in mtrace_out()
106 w = head; in mtrace_out()
108 memcpy(data + w, str, out); in mtrace_out()
[all …]
/Zephyr-latest/tests/lib/cmsis_nn/src/
Dmain.c62 input_dims.w = AVGPOOLING_2_INPUT_W; in ZTEST()
65 filter_dims.w = AVGPOOLING_2_FILTER_X; in ZTEST()
67 output_dims.w = AVGPOOLING_2_OUTPUT_W; in ZTEST()
71 pool_params.padding.w = AVGPOOLING_2_PAD_X; in ZTEST()
73 pool_params.stride.w = AVGPOOLING_2_STRIDE_X; in ZTEST()
130 94, 49, 10, 112, -71, -27, -91, -79, 52, -92, -71, 86, -79, -15, -80,
132 125, 17, 6, -4, 46, 119, 113, -116, -125, 80, -57, 122, 75, 119, -117,
139 -102, -114, 25, -77, 25, 7, 64, 110, 80, -93, -20, 34, 115, 75, 37,
168 input_dims.w = CONV_4_INPUT_W; in ZTEST()
171 filter_dims.w = CONV_4_FILTER_X; in ZTEST()
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/Zephyr-latest/drivers/adc/
DKconfig.tla202x1 # Copyright (c) 2023 Caspar Friedrich <c.s.w.friedrich@gmail.com>
19 default 80
/Zephyr-latest/dts/bindings/gpio/
Dmicrobit,edge-connector.yaml18 with an 80w 1.27mm pitch that can be used to easily access these extra pins.
/Zephyr-latest/subsys/bluetooth/crypto/
Dbt_crypto.c56 int bt_crypto_f5(const uint8_t *w, const uint8_t *n1, const uint8_t *n2, const bt_addr_le_t *a1, in bt_crypto_f5() argument
73 LOG_DBG("w %s", bt_hex(w, 32)); in bt_crypto_f5()
77 sys_memcpy_swap(ws, w, 32); in bt_crypto_f5()
117 int bt_crypto_f6(const uint8_t *w, const uint8_t *n1, const uint8_t *n2, const uint8_t *r, in bt_crypto_f6() argument
125 LOG_DBG("w %s", bt_hex(w, 16)); in bt_crypto_f6()
146 sys_memcpy_swap(ws, w, 16); in bt_crypto_f6()
163 uint8_t m[80], xs[16]; in bt_crypto_g2()
192 int bt_crypto_h6(const uint8_t w[16], const uint8_t key_id[4], uint8_t res[16]) in bt_crypto_h6()
198 LOG_DBG("w %s", bt_hex(w, 16)); in bt_crypto_h6()
201 sys_memcpy_swap(ws, w, 16); in bt_crypto_h6()
[all …]
/Zephyr-latest/tests/benchmarks/latency_measure/
DREADME.rst74 …fifo.get.blocking.k_to_k - Get data from FIFO (w/ ctx switch) : …
75 …fifo.put.wake+ctx.k_to_k - Add data to FIFO (w/ ctx switch) : …
76 …fifo.get.free.blocking.k_to_k - Free when getting data from FIFO (w/ ctx siwtch) : …
77 …fifo.put.alloc.wake+ctx.k_to_k - Allocate to add data to FIFO (w/ ctx switch) : …
82 …lifo.get.blocking.k_to_k - Get data from LIFO (w/ ctx switch) : …
83 …lifo.put.wake+ctx.k_to_k - Add data to LIFO (w/ ctx switch) : …
84 …lifo.get.free.blocking.k_to_k - Free when getting data from LIFO (w/ ctx switch) : …
85 …lifo.put.alloc.wake+ctx.k_to_k - Allocate to add data to LIFO (w/ ctx siwtch) : …
90 …events.wait.blocking.k_to_k - Wait for any events (w/ ctx switch) : …
91 …events.set.wake+ctx.k_to_k - Set events (w/ ctx switch) : …
[all …]
/Zephyr-latest/samples/modules/tflite-micro/magic_wand/train/
Ddata_prepare.py90 if i > 80:
111 if i > 80:
124 if i > 80:
144 with open(path, "w") as f:
/Zephyr-latest/doc/project/
Drelease_process.rst44 :width: 80%
166 * - T-7W
170 * - T-4W
174 * - T-3W
179 * - T-2W
183 * - T-1W
189 * - T-0W
219 :width: 80%
335 :width: 80%
/Zephyr-latest/doc/hardware/porting/board/
Dboard-terminology.svg3 …w+T4fu/1O/2EjEqDdq1f+DtDuaSKCjRRNAlMQYC567Yh4zMAHCwp0p7i7/ds8R+uURpTyoUyBbj+yL2qyeVyhX5FfX00ESiJR1…
/Zephyr-latest/samples/subsys/usb/webusb-next/src/
Dmsosv2.h68 .CompatibleID = {'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00},
76 .wPropertyDataLength = 80,
/Zephyr-latest/samples/subsys/dap/src/
Dmain.c62 'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00
102 .wPropertyDataLength = 80,
175 'w', 'w', 'w', '.',
/Zephyr-latest/subsys/shell/
DKconfig100 default 80
197 Ctrl+f, Ctrl+k, Ctrl+l, Ctrl+u, Ctrl+w, Alt+b, Alt+f
253 By default shell assumes width of a terminal screen set to 80
/Zephyr-latest/samples/subsys/profiling/perf/images/
Dgraph_example.svg160 var w = parseFloat(r.attributes.width.value) -3;
165 if (w < 2 * 12 * 0.59) {
172 // check if only whitespace or if we can fit the entire string into width w
173 if (/^ *$/.test(txt) || sl < w)
178 var start = Math.floor((w/sl) * txt.length);
180 if (t.getSubStringLength(0, x + 2) <= w) {
358 var w = parseFloat(rect.attributes.width.value);
359 if (w > maxwidth)
360 maxwidth = w;
370 matches[x] = w;
[all …]
/Zephyr-latest/include/zephyr/dt-bindings/interrupt-controller/
Desp32s2-xtensa-intmux.h42 #define SPI1_INTR_SOURCE 32 /* SPI1, level, flash r/w, do not use this */
90 #define PMS_DMA_APB_I_ILG_INTR_SOURCE 80 /* illegal APB access, level */
/Zephyr-latest/subsys/net/lib/lwm2m/
Dlwm2m_rw_senml_cbor.c182 memset(CPKT_BUF_W_PTR(out->out_cpkt), 0x80, len); /* 80 # array(0) */ in put_empty_array()
1082 int w; in path_to_string() local
1096 w = snprintk(&(buf[fpl]), buf_size - fpl, "/"); in path_to_string()
1099 w = snprintk(&(buf[fpl]), buf_size - fpl, "%" PRIu16 "/", input->obj_id); in path_to_string()
1102 w = snprintk(&(buf[fpl]), buf_size - fpl, "%" PRIu16 "/", in path_to_string()
1106 w = snprintk(&(buf[fpl]), buf_size - fpl, "%" PRIu16 "", input->res_id); in path_to_string()
1109 w = snprintk(&(buf[fpl]), buf_size - fpl, "/%" PRIu16 "", in path_to_string()
1117 if (w < 0 || w >= buf_size - fpl) { in path_to_string()
1122 fpl += w; in path_to_string()
/Zephyr-latest/samples/subsys/usb/webusb/src/
Dmain.c39 'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00
86 .wPropertyDataLength = 80,
239 'W', 'I', 'N', 'U', 'S', 'B', 0x00, 0x00,
/Zephyr-latest/samples/tfm_integration/psa_crypto/
DREADME.rst288 00000130 34 1E 1C D2 80 5D A3 A5 01 64 4E 53 50 45 04 65 4....]...dNSPE.e
299 000001E0 40 59 23 3E 80 5E E0 9F FA E3 F4 14 62 D3 15 A5 @Y#>.^......b...
302 00000210 4E D4 85 D2 57 15 72 11 E8 9E 06 4F C4 46 D0 58 N...W.r....O.F.X
341 00000000 24 5C B3 EB 88 D2 80 76 23 B3 07 CA 16 92 8F 3D $\.....v#......=
344 00000030 1B 30 6E 3C DA 80 F2 55 F7 FA 10 8B F5 78 CE 92 .0n<...U.....x..
355 000000E0 80 ED 7E 9D 0A 21 09 9C 9C 55 A9 14 AF A2 66 65 ..~..!...U....fe
/Zephyr-latest/boards/st/stm32wb5mmg/doc/
Dstm32wb5mmg.rst111 protection (PCROP) against R/W
145 - Sector protection against R/W operation (PCROP)
284 Device found: CE:5B:9A:87:69:4F (random) (RSSI -80), type 3, AD data len 8
/Zephyr-latest/boards/st/sensortile_box_pro/
Dsensortile_box_pro.dts106 mul-n = <80>;
333 * with TZEN=0 (so w/o TFM).
/Zephyr-latest/subsys/net/lib/http/
Dhttp_parser_url.c78 /* 80 P 81 Q 82 R 83 S 84 T 85 U 86 V 87 W */
86 /* 112 p 113 q 114 r 115 s 116 t 117 u 118 v 119 w */
/Zephyr-latest/boards/st/sensortile_box_pro/doc/
Dindex.rst183 if found pressed after h/w reset (see **rst** button and
193 driven by the PLL clock at 80MHz, driven by the 16MHz external oscillator.
195 The internal AHB/APB1/APB2 AMBA buses are all clocked at 80MHz.
/Zephyr-latest/drivers/clock_control/
Dclock_stm32_ll_common.c345 /* APB2 bus exists, but w/o dedicated prescaler */ in stm32_clock_control_get_subsys_rate()
352 /* AHB3 bus exists, but w/o dedicated prescaler */ in stm32_clock_control_get_subsys_rate()
841 (MHZ(80) < CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC)) { in stm32_clock_control_init()
868 (MHZ(80) < CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC)) { in stm32_clock_control_init()
/Zephyr-latest/doc/connectivity/bluetooth/img/
Dl2cap_k_frame_1.drawio.svg4 …80&quot; as=&quot;geometry&quot; /&gt;&#xA; &lt;/mxCell&gt;&#xA; &lt;mxCell id=&quot…
Dl2cap_b_frame.drawio.svg4 …80&quot; as=&quot;geometry&quot; /&gt;&#xA; &lt;/mxCell&gt;&#xA; &lt;mxCell id=&quot…
/Zephyr-latest/doc/build/cmake/
Dbuild-build-phase-3.svg4 …w==&lt;/diagram&gt;&lt;diagram name=&quot;Binary - Intermediate 2&quot; id=&quot;Kr30LreMGFj5Nu7hc…

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