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/nrf_hw_models-3.6.0/docs/
DRADIO_states.svg1 <?xml version="1.0" encoding="UTF-8"?>
4 …8Ph6lLx29ZpSgvVGi04MPz3M/8u7W7pRdeaYDT8/No+WCHkH6M+3SCyPvpfJdYU4Bih0vWHpR+EqbpDegjL6vOVmT4+fCGKSn5…
DGPIO.md65 It is possible to short one output to several (up to 8) inputs.
DLICENSE160 8. Limitation of Liability. In no event and under no legal theory,
/nrf_hw_models-3.6.0/src/HW_models/
DNHW_RADIO_utils.c61 int check = ( ( 8 << RADIO_PCNF0_LFLEN_Pos ) in nrfra_check_ble1M_conf()
84 int check = ( ( 8 << RADIO_PCNF0_LFLEN_Pos ) in nrfra_check_ble2M_conf()
121 | ( 8 << RADIO_PCNF0_LFLEN_Pos ) in nrfra_check_802154_conf()
231 | (NRF_RADIO_regs.BASE0 >> 8); in nhwra_prep_rx_request()
272 rx_req->header_duration = header_length*8/bits_per_us; in nhwra_prep_rx_request()
280 rx_req->pream_and_addr_duration = (preamble_length + address_length)*8/bits_per_us; in nhwra_prep_rx_request()
315 | (NRF_RADIO_regs.BASE0 >> 8); in nhwra_prep_tx_request()
372 cca_req->scan_duration = 8*symbol_time; in nhwra_prep_cca_request()
399 cca_req->scan_duration = 8 * symbol_time * ((NRF_RADIO_regs.EDCNT & RADIO_EDCNT_EDCNT_Msk) + 1); in nhwra_prep_cca_request()
431 LFLenB = (LFLenb + 7)/8; in nhwra_get_payload_length()
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DNHW_config.h84 [8 ] = "TIMER0",\
168 #define NHW_TIMER_INT_MAP {{0 , 8}, \
299 [8 ]= "SERIAL0",\
338 [8 ] = "RADIO",\
379 #define NHW_RADIO_INT_MAP {{1 , 8}} /*Net core,RADIO_IRQn*/
436 #define NHW_TIMER_N_CC {6, 6, 6, 8, 8, 8}
437 #define NHW_TIMER_MAX_N_CC 8
447 #define NHW_UARTE_INT_MAP {{0 , 8}, \
Dcrc.c27 | rev_byte((input >> 8) & 0xff) << 8 in rev_24()
37 ret = rev_byte((input >> 0) & 0xff) << 8 in rev_16()
38 | rev_byte((input >> 8) & 0xff) << 0; in rev_16()
92 crc = (crc_table_24_ble[tbl_idx] ^ (crc >> 8)) & 0xffffff; in crc_update_ble()
111 buf[len + i] = (crc >> (i*8)) & 0xff; in append_crc_ble()
169 crc = (crc_table_154[tbl_idx] ^ (crc >> 8)) & 0xffff; in crc_update_154()
186 buf[len + i] = (crc >> (i*8)) & 0xff; in append_crc_154()
DNHW_RADIO.c231 for (int i = 0; i < 8; i++) in radio_reset()
767 packet_duration = preamble_len*8 + address_len*8; in start_Tx()
768 packet_duration += header_len*8 + payload_len*8 + crc_len*8; in start_Tx()
780 …tx_status.ADDRESS_end_time = nsi_hws_get_time() + (bs_time_t)((preamble_len*8 + address_len*8)/bit… in start_Tx()
781 …tx_status.PAYLOAD_end_time = tx_status.ADDRESS_end_time + (bs_time_t)(8*(header_len + payload_len)… in start_Tx()
782 tx_status.CRC_end_time = tx_status.PAYLOAD_end_time + (bs_time_t)(crc_len*8/bits_per_us); in start_Tx()
832 payload_end = rx_status.rx_resp.rx_time_stamp + (bs_time_t)((2+length)*8/bits_per_us); in Rx_handle_address_end_response()
834 payload_end = rx_status.rx_resp.rx_time_stamp + (bs_time_t)((1+length)*8/bits_per_us); in Rx_handle_address_end_response()
919 #define RX_N_ADDR 8 /* How many addresses we can search in parallel */ in start_Rx()
929 rx_status.S1Offset = 1; /*1 byte offset in RAM (S1 length > 8 not supported)*/ in start_Rx()
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DNHW_EGU.c251 void nhw_egu_0_TASK_TRIGGER_8(void){ nhw_egu_TASK_TRIGGER(0,8); } in nhw_egu_0_TASK_TRIGGER_8()
267 void nhw_egu_1_TASK_TRIGGER_8(void){ nhw_egu_TASK_TRIGGER(1,8); } in nhw_egu_1_TASK_TRIGGER_8()
283 void nhw_egu_2_TASK_TRIGGER_8(void){ nhw_egu_TASK_TRIGGER(2,8); } in nhw_egu_2_TASK_TRIGGER_8()
299 void nhw_egu_3_TASK_TRIGGER_8(void){ nhw_egu_TASK_TRIGGER(3,8); } in nhw_egu_3_TASK_TRIGGER_8()
315 void nhw_egu_4_TASK_TRIGGER_8(void){ nhw_egu_TASK_TRIGGER(4,8); } in nhw_egu_4_TASK_TRIGGER_8()
331 void nhw_egu_5_TASK_TRIGGER_8(void){ nhw_egu_TASK_TRIGGER(5,8); } in nhw_egu_5_TASK_TRIGGER_8()
DNHW_AAR.c145 uint32_t value = ptr[0] | (ptr[1] << 8) | (ptr[2] << 16); in read_3_bytes_value()
187 prand_buf[14] = (prand >> 8) & 0xFF; in nhw_aar_resolve()
203 …hash_check = hash_check_buf[15] | (uint32_t)hash_check_buf[14] << 8 | (uint32_t)hash_check_buf[13]… in nhw_aar_resolve()
DNHW_AES_CCM.c97 #define IV_LEN 8
115 packet_counter >>= 8; in nonce_calc()
118 // Copy initialization vector into remaining 8 bytes of nonce in nonce_calc()
DNRF_PPI.c271 {(void*)&NRF_EGU_regs[0].TASKS_TRIGGER[8] , nhw_egu_0_TASK_TRIGGER_8},
287 {(void*)&NRF_EGU_regs[1].TASKS_TRIGGER[8] , nhw_egu_1_TASK_TRIGGER_8},
303 {(void*)&NRF_EGU_regs[2].TASKS_TRIGGER[8] , nhw_egu_2_TASK_TRIGGER_8},
319 {(void*)&NRF_EGU_regs[3].TASKS_TRIGGER[8] , nhw_egu_3_TASK_TRIGGER_8},
335 {(void*)&NRF_EGU_regs[4].TASKS_TRIGGER[8] , nhw_egu_4_TASK_TRIGGER_8},
351 {(void*)&NRF_EGU_regs[5].TASKS_TRIGGER[8] , nhw_egu_5_TASK_TRIGGER_8},
477 {EGU0_EVENTS_TRIGGERED_8, &NRF_EGU_regs[0].EVENTS_TRIGGERED[8]},
493 {EGU1_EVENTS_TRIGGERED_8, &NRF_EGU_regs[1].EVENTS_TRIGGERED[8]},
509 {EGU2_EVENTS_TRIGGERED_8, &NRF_EGU_regs[2].EVENTS_TRIGGERED[8]},
525 {EGU3_EVENTS_TRIGGERED_8, &NRF_EGU_regs[3].EVENTS_TRIGGERED[8]},
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DNRF5340_peri_types.h59 } FICR_TRIMCNF_Type; /*!< Size = 8 (0x8) …
100 …__IOM uint32_t DFEGPIO[8]; /*!< (@ 0x00000000) Description collection: Pin sele…
120 } DPPIC_TASKS_CHG_Type; /*!< Size = 8 (0x8) …
131 } DPPIC_SUBSCRIBE_CHG_Type; /*!< Size = 8 (0x8) …
149 } RESET_NETWORK_Type; /*!< Size = 8 (0x8) …
739 …d length. Effective length of LENGTH field in encrypted/decrypted packet is 8 bits. A keystream fo…
1215 /* Bit 8 : Enable or disable interrupt for event HFCLKAUDIOSTARTED */
1216 #define CLOCK_INTEN_HFCLKAUDIOSTARTED_Pos (8UL) /*!< Position of HFCLKAUDIOSTARTED field. */
1249 /* Bit 8 : Write '1' to enable interrupt for event HFCLKAUDIOSTARTED */
1250 #define CLOCK_INTENSET_HFCLKAUDIOSTARTED_Pos (8UL) /*!< Position of HFCLKAUDIOSTARTED field. */
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DNRF_GPIOTE.c301 for i in range(0,8):
305 for i in range(0,8):
DNRF_PPI.h100 //8 0x40008000 TIMER0
DNRF_GPIO_backend.c39 #define MAX_SHORTS 8
DNHW_CLOCK.c44 * 8. After TASK_CTSTART EVENTS_CTSTARTED is raised immediately,
DNHW_UART.c216 return NRF_UARTE_regs[inst].ENABLE == 8; in uarte_enabled()
225 bs_time_t duration = 1 + 8 + 1; /* Start bit, byte, and at least 1 stop bit */ in nhw_uarte_one_byte_time()
DNHW_UART_backend_fifo.c422 bs_trace_info_time(8, "UART%i: Received byte (0x%02X)\n", in uf_rx_process_last_msg_post()
DNHW_RTC.c423 bs_trace_raw_time(8, "RTC%i: Timer overflow\n", rtc); in handle_overflow_event()