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/Zephyr-latest/samples/bluetooth/peripheral_identity/
Dprj.conf9 CONFIG_BT_MAX_CONN=62
10 CONFIG_BT_ID_MAX=62
13 # CONFIG_BT_MAX_PAIRED=62
/Zephyr-latest/boards/cypress/cy8ckit_062_wifi_bt/doc/
Dindex.rst10 platform that enables design and debug of the PSOC 62 MCU and the Murata
13 The PSOC 6 WiFi-BT Pioneer Kit features the PSOC 62 MCU: a
71 For more information about the PSOC 62 MCU SoC and CY8CKIT-062-WiFi-BT board:
73 - `PSOC 62 MCU SoC Website`_
74 - `PSOC 62 MCU Datasheet`_
75 - `PSOC 62 MCU Architecture Reference Manual`_
76 - `PSOC 62 MCU Register Reference Manual`_
108 The PSOC 62 MCU SoC is configured to use the internal IMO+FLL as a source for
115 The PSOC 62 MCU SoC has 9 SCB blocks 8 of each can be configured as UART
191 .. _PSOC 62 MCU SoC Website:
[all …]
/Zephyr-latest/samples/bluetooth/central_multilink/
Dprj.conf6 CONFIG_BT_MAX_CONN=62
11 # CONFIG_BT_MAX_PAIRED=62
DREADME.rst5 Scan, connect and establish connection to up to 62 peripherals.
11 BLE devices and establishing connection to up to 62 peripherals with a strong
/Zephyr-latest/boards/nordic/nrf54h20dk/
Dnrf54h20dk_nrf54h20_cpuppr_0_9_0.yaml11 ram: 62
12 flash: 62
Dnrf54h20dk_nrf54h20_cpuppr_xip_0_9_0.yaml11 ram: 62
/Zephyr-latest/boards/infineon/cy8cproto_062_4343w/doc/
Dindex.rst19 For more information about the PSOC 62 MCU SoC and CY8CPROTO-062-4343W board:
21 - `PSOC 62 MCU SoC Website`_
22 - `PSOC 62 MCU Datasheet`_
23 - `PSOC 62 MCU Architecture Reference Manual`_
24 - `PSOC 62 MCU Register Reference Manual`_
77 The PSOC 62 MCU SoC is configured to use the internal IMO+FLL as a source for
164 .. _PSOC 62 MCU SoC Website:
167 .. _PSOC 62 MCU Datasheet:
168 …https://www.cypress.com/documentation/datasheets/psoc-6-mcu-psoc-62-datasheet-programmable-system-…
170 .. _PSOC 62 MCU Architecture Reference Manual:
[all …]
/Zephyr-latest/dts/common/nordic/
Dnrf54l10.dtsi31 /* 960 + 62 = 1022KB */
35 reg = <0xf0000 DT_SIZE_K(62)>;
/Zephyr-latest/drivers/dma/
Ddma_iproc_pax_v1.h81 uint64_t type : 2; /*type 63:62 set to b'11*/
88 uint64_t type : 2; /*63:62 set to b'11*/
93 uint64_t pcie_addr : 62; /*pcie_addr[63:2]*/
94 uint64_t type : 2; /*63:62 set to b'11*/
/Zephyr-latest/tests/drivers/i2c/i2c_tca954x/
Dprj.conf4 CONFIG_I2C_TCA954X_CHANNEL_INIT_PRIO=62
/Zephyr-latest/boards/infineon/cy8ckit_062s4/
Dboard.yml3 full_name: PSOC 62S4 Pioneer Kit
Dcy8ckit_062s4.yaml5 name: CY8CKIT-062S4 PSOC 62S4
/Zephyr-latest/soc/st/stm32/stm32wlx/
DKconfig.defconfig.stm32wl54xx9 default 62
DKconfig.defconfig.stm32wl55xx9 default 62
DKconfig.defconfig.stm32wle4xx9 default 62
DKconfig.defconfig.stm32wle5xx9 default 62
/Zephyr-latest/samples/drivers/led/pca9633/
Dapp.overlay7 pca9633@62 {
/Zephyr-latest/boards/shields/pmod_sd/boards/
Dek_ra8d1.overlay8 interrupts = <60 12>, <61 12>, <62 12>;
/Zephyr-latest/soc/espressif/esp32c3/
DKconfig.defconfig7 default 62
/Zephyr-latest/dts/arm/atmel/
Dsame70q19.dtsi20 erase-blocks = <&eefc 8 2048>, <&eefc 62 8192>;
Dsame70q19b.dtsi20 erase-blocks = <&eefc 8 2048>, <&eefc 62 8192>;
Dsamv71x19.dtsi19 erase-blocks = <&eefc 8 2048>, <&eefc 62 8192>;
Dsamv71x19b.dtsi20 erase-blocks = <&eefc 8 2048>, <&eefc 62 8192>;
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Dti-cc32xx-pinctrl.h201 #define GPIO7_P62 TI_CC32XX_PINMUX(62U, 0U)
202 #define MCACLKX_P62 TI_CC32XX_PINMUX(62U, 13U)
203 #define UART1_RTS_P62 TI_CC32XX_PINMUX(62U, 3U)
204 #define UART0_RTS_P62 TI_CC32XX_PINMUX(62U, 10U)
205 #define UART0_TX_P62 TI_CC32XX_PINMUX(62U, 11U)
/Zephyr-latest/dts/bindings/pinctrl/
Dti,cc32xx-pinctrl.yaml37 /* configure pin 57 as UART0 RX and pin 62 as UART0 RTS */
39 /* both pin 57 and 62 have pull-up enabled */

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