/mcuboot-3.5.0/ext/fiat/src/ |
D | curve25519.h | 195 uint64_t x5 = ((uint64_t)(arg1[9]) * ((arg2[5]) * ((uint32_t)0x2 * UINT8_C(0x13)))); in fiat_25519_carry_mul() 204 uint64_t x14 = ((uint64_t)(arg1[8]) * ((arg2[5]) * (uint32_t)UINT8_C(0x13))); in fiat_25519_carry_mul() 212 uint64_t x22 = ((uint64_t)(arg1[7]) * ((arg2[5]) * ((uint32_t)0x2 * UINT8_C(0x13)))); in fiat_25519_carry_mul() 219 uint64_t x29 = ((uint64_t)(arg1[6]) * ((arg2[5]) * (uint32_t)UINT8_C(0x13))); in fiat_25519_carry_mul() 221 uint64_t x31 = ((uint64_t)(arg1[5]) * ((arg2[9]) * ((uint32_t)0x2 * UINT8_C(0x13)))); in fiat_25519_carry_mul() 222 uint64_t x32 = ((uint64_t)(arg1[5]) * ((arg2[8]) * (uint32_t)UINT8_C(0x13))); in fiat_25519_carry_mul() 223 uint64_t x33 = ((uint64_t)(arg1[5]) * ((arg2[7]) * ((uint32_t)0x2 * UINT8_C(0x13)))); in fiat_25519_carry_mul() 224 uint64_t x34 = ((uint64_t)(arg1[5]) * ((arg2[6]) * (uint32_t)UINT8_C(0x13))); in fiat_25519_carry_mul() 225 uint64_t x35 = ((uint64_t)(arg1[5]) * ((arg2[5]) * ((uint32_t)0x2 * UINT8_C(0x13)))); in fiat_25519_carry_mul() 246 uint64_t x56 = ((uint64_t)(arg1[5]) * (arg2[4])); in fiat_25519_carry_mul() [all …]
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D | curve25519.c | 258 for (i = 1; i < 5; ++i) { in fe_loose_invert() 293 for (i = 1; i < 5; ++i) { in fe_loose_invert() 329 // return 1 if f is in {1,3,5,...,q-2} 363 for (i = 1; i < 5; ++i) { in fe_pow22523() 440 fe_pow22523(&h->X, &h->X); // x = (uv^7)^((q-5)/8) in x25519_ge_frombytes_vartime() 442 fe_mul_ttt(&h->X, &h->X, &u); // x = uv^3(uv^7)^((q-5)/8) in x25519_ge_frombytes_vartime() 634 // B is the Ed25519 base point (x,4/5) with x positive. 639 ge_cached Ai[8]; // A,3A,5A,7A,9A,11A,13A,15A in ge_double_scalarmult_vartime() 665 x25519_ge_p3_to_cached(&Ai[5], &u); in ge_double_scalarmult_vartime() 666 x25519_ge_add(&t, &A2, &Ai[5]); in ge_double_scalarmult_vartime() [all …]
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/mcuboot-3.5.0/ext/mbedtls-asn1/include/mbedtls/ |
D | error.h | 48 * 5 bits - Module-dependent error code 61 * AES 5 0x0020-0x0022 0x0021-0x0025 96 * MD 5 5 97 * HKDF 5 1 (Started from top) 98 * SSL 5 2 (Started from 0x5F00) 104 * Module dependent error code (5 bits 0x.00.-0x.F8.)
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D | oid.h | 54 #define MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME (1 << 5) 71 #define MBEDTLS_OID_ISO_CCITT_DS "\x55" /* {joint-iso-ccitt(2) ds(5)} */ 111 …MBEDTLS_OID_ISO_CCITT_DS "\x1D" /**< id-ce OBJECT IDENTIFIER ::= {joint-iso-ccitt(2) ds(5) 29} */ 118 * security(5) mechanisms(5) pkix(7) } 126 … MBEDTLS_OID_ISO_CCITT_DS "\x04" /**< id-at OBJECT IDENTIFIER ::= {joint-iso-ccitt(2) ds(5) 4} */ 129 …SERIAL_NUMBER MBEDTLS_OID_AT "\x05" /**< id-at-serialNumber AttributeType:= {id-at 5} */ 222 … MBEDTLS_OID_PKCS "\x05" /**< pkcs-5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi… 231 …TLS_OID_PKCS1_SHA1 MBEDTLS_OID_PKCS1 "\x05" /**< sha1WithRSAEncryption ::= { pkcs-1 5 } */ 248 …_md5 OBJECT IDENTIFIER ::= { iso(1) member-body(2) us(840) rsadsi(113549) digestAlgorithm(2) 5 } */ 282 … MBEDTLS_OID_AES "\x05" /** id-aes128-wrap OBJECT IDENTIFIER ::= { aes 5 } */ [all …]
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/mcuboot-3.5.0/samples/zephyr/bad-keys/ |
D | bad-rsa-2048.pem | 3 5W5C9tsdDalhN5HV7xBQCzr7GSW1C6MNvtw/lVr4+x4LvgwYD6kl+9IZc5udPIJ1 6 DqxaM0ovSXfXvOfMeKN76iI9m8S4JnPbuzu+/5GdSnNbIxoluzXU7e52FoKgthNM
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/mcuboot-3.5.0/testplan/mynewt/ |
D | key_rsa_2.pem | 15 Q0VxFblhvwGhvi0+SydC9MowTzcv/5wAV7zp2AK6+fBjenE3aCPNZCyNAoGBAMZK 25 5vXEmPmqk9qYxmKIr5MLM9229gWCCGt7wWdH5Xt0AT7ZUvxwyKnaS/QimOVU2X1t
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/mcuboot-3.5.0/boot/cypress/platforms/PSOC_062_2M/CM4/GCC_ARM/ |
D | startup_psoc6_02_cm4.S | 100 .long ioss_interrupts_gpio_5_IRQHandler /* GPIO Port Interrupt #5 */ 123 …ong cpuss_interrupts_ipc_5_IRQHandler /* CPUSS Inter Process Communication Interrupt #5 */ 139 .long scb_5_interrupt_IRQHandler /* Serial Communication Block #5 */ 156 .long cpuss_interrupts_dw0_5_IRQHandler /* CPUSS DataWire #0, Channel #5 */ 185 .long cpuss_interrupts_dw1_5_IRQHandler /* CPUSS DataWire #1, Channel #5 */ 223 .long tcpwm_0_interrupts_5_IRQHandler /* TCPWM #0, Counter #5 */ 231 .long tcpwm_1_interrupts_5_IRQHandler /* TCPWM #1, Counter #5 */ 530 def_irq_handler ioss_interrupts_gpio_5_IRQHandler /* GPIO Port Interrupt #5 */ 553 …ndler cpuss_interrupts_ipc_5_IRQHandler /* CPUSS Inter Process Communication Interrupt #5 */ 569 def_irq_handler scb_5_interrupt_IRQHandler /* Serial Communication Block #5 */ [all …]
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/mcuboot-3.5.0/ext/tinycrypt/tests/ |
D | test_ecc_dsa.c | 173 "5e666c0db0214c3b627a8e48541cc84a8b6fd15f300da4dff5d18aec6c55b881", in cavp_sign() 187 "5d833e8d24cc7a402d7ee7ec852a3587cddeb48358cea71b0bedb8fabe84e0c4", in cavp_sign() 202 "5b1a045ee2bcd2e6dca3bdf46c4310a7461f9a37960ca672d3feb5473e253605fb1ddfd280" in cavp_sign() 227 "5e07030a577cc5d176387154eabae2af52a83e85c61c7c61da930c9b19e45d7e34c8516dc3" in cavp_sign() 504 "5cf02a00d205bdfee2016f7421807fc38ae69e6b7ccd064ee689fc1a94a9f7d2", in cavp_verify() 523 "5f70c7d11ac2b7a435ccfbbae02c3df1ea6b532cc0e9db74f93fffca7c6f9a64", in cavp_verify() 552 "5cc8aa7c35743ec0c23dde88dabd5e4fcd0192d2116f6926fef788cddb754e73", in cavp_verify()
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/mcuboot-3.5.0/ |
D | Cargo.lock | 7 version = "0.7.5" 145 version = "0.14.5" 272 version = "0.8.5" 302 version = "1.5.5" 517 checksum = "5c839a674fcd7a98952e593242ea400abe93992746761e38641405d28b00f419" 531 version = "0.1.5"
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D | enc-aes256kw.b64 | 1 5FxRRtIcgjXMGhmvofKqIMiMf0Bs2yKqarXLqvixW7Q=
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/mcuboot-3.5.0/docs/ |
D | Gemfile.lock | 9 addressable (2.8.5) 31 ffi (1.15.5) 229 ruby2_keywords (0.0.5) 231 safe_yaml (1.0.5) 238 addressable (>= 2.3.5)
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/mcuboot-3.5.0/boot/espressif/port/esp32s2/ |
D | bootloader.conf | 29 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 35 # CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5
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/mcuboot-3.5.0/scripts/imgtool/ |
D | version.py | 42 int(m.group(5)) if m.group(5) else 0,
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/mcuboot-3.5.0/boot/espressif/port/esp32c3/ |
D | bootloader.conf | 31 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 37 # CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5
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/mcuboot-3.5.0/boot/espressif/port/esp32c6/ |
D | bootloader.conf | 31 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 37 # CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5
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/mcuboot-3.5.0/boot/espressif/port/esp32h2/ |
D | bootloader.conf | 31 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 37 # CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5
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/mcuboot-3.5.0/ext/tinycrypt-sha512/lib/source/ |
D | sha512.c | 49 * of the square roots of the first 8 primes: 2, 3, 5, 7, 11, 13, 17 in tc_sha512_init() 58 s->iv[5] = 0x9b05688c2b3e6c1f; in tc_sha512_init() 119 s->leftover[sizeof(s->leftover) - 5] = (uint8_t)(s->bits_hashed >> 32); in tc_sha512_final() 208 e = iv[4]; f = iv[5]; g = iv[6]; h = iv[7]; in compress() 233 iv[4] += e; iv[5] += f; iv[6] += g; iv[7] += h; in compress()
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/mcuboot-3.5.0/ext/tinycrypt/lib/source/ |
D | sha256.c | 49 * of the square roots of the first 8 primes: 2, 3, 5, 7, 11, 13, 17 in tc_sha256_init() 58 s->iv[5] = 0x9b05688c; in tc_sha256_init() 115 s->leftover[sizeof(s->leftover) - 5] = (uint8_t)(s->bits_hashed >> 32); in tc_sha256_final() 191 e = iv[4]; f = iv[5]; g = iv[6]; h = iv[7]; in compress() 216 iv[4] += e; iv[5] += f; iv[6] += g; iv[7] += h; in compress()
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D | ctr_prng.c | 109 /* 10.2.1.2 step 5 */ in tc_ctr_prng_update() 150 /* 10.2.1.3.1 step 5 */ in tc_ctr_prng_init() 197 /* 10.2.1.4.1 step 5 */ in tc_ctr_prng_reseed() 249 /* 10.2.1.5.1 step 4.3/step 5 */ in tc_ctr_prng_generate()
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/mcuboot-3.5.0/boot/boot_serial/src/ |
D | boot_serial_priv.h | 43 #define MGMT_ERR_ENOENT 5 56 #define NMGR_ID_RESET 5
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/mcuboot-3.5.0/boot/espressif/port/esp32s3/ |
D | bootloader.conf | 51 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5 57 # CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5
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/mcuboot-3.5.0/ptest/ |
D | Cargo.lock | 323 checksum = "5bd2fe26506023ed7b5e1e315add59d6f584c621d037f9368fea9cfb988f368c" 341 checksum = "5c839a674fcd7a98952e593242ea400abe93992746761e38641405d28b00f419" 355 version = "0.1.5" 370 version = "0.4.5"
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/mcuboot-3.5.0/boot/cypress/platforms/PSOC_062_2M/CM0P/GCC_ARM/ |
D | startup_psoc6_02_cm0plus.S | 100 .long NvicMux5_IRQHandler /* CPU User Interrupt #5 */ 108 .long Internal5_IRQHandler /* Internal SW Interrupt #5 */ 357 def_irq_handler NvicMux5_IRQHandler /* CPU User Interrupt #5 */ 365 def_irq_handler Internal5_IRQHandler /* Internal SW Interrupt #5 */
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/mcuboot-3.5.0/boot/cypress/platforms/ |
D | cycfg_pins.h | 42 #define CYBSP_UART_RX_PORT_NUM 5U 66 #define CYBSP_UART_TX_PORT_NUM 5U
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/mcuboot-3.5.0/boot/espressif/ |
D | main.c | 112 * 5) Encrypt flash in-place including bootloader, image primary/secondary slot and scratch. in main() 220 /* Step 4, 5 & 6 (see above for full description): in main() 222 * 5) Encrypt flash in-place including bootloader, image primary/secondary slot and scratch. in main()
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