Searched full:320 (Results 1 – 25 of 169) sorted by relevance
1234567
| /Zephyr-latest/tests/drivers/interrupt_controller/multi_level_backend/ |
| D | Kconfig | 10 # (64 x 4) + 64 = 320
11 default 320
|
| /Zephyr-latest/samples/drivers/video/capture_to_lvgl/ |
| D | README.rst | 50 [00:00:02.780,000] <inf> main: RGBP width [320; 320; 0] height [240; 240; 0]
60 [00:00:02.780,000] <inf> main: JPEG width [320; 320; 0] height [240; 240; 0]
67 [00:00:02.852,000] <inf> main: - Format: RGBP 160x120 320
|
| D | Kconfig | 12 default 320
|
| /Zephyr-latest/dts/bindings/sensor/ |
| D | vishay,vcnl4040.yaml | 45 - 320
81 - 320
|
| D | vishay,vcnl36825t.yaml | 29 enum: [10, 20, 40, 80, 160, 320]
35 - [80, 320] ms only in low power mode
76 This allows to increase the measurement period up to 320 ms.
|
| /Zephyr-latest/tests/subsys/display/cfb/basic/src/ |
| D | clear.c | 52 zassert_false(verify_color_inside_rect(0, 0, 320, 240, 0x0)); in ZTEST()
59 zassert_true(verify_color_inside_rect(0, 0, 320, 240, 0x0)); in ZTEST()
|
| /Zephyr-latest/dts/bindings/display/ |
| D | solomon,ssd1608.yaml | 4 description: Solomon Systech SSD1608 320x240 EPD display controller
|
| /Zephyr-latest/boards/st/stm32f469i_disco/ |
| D | stm32f469i_disco.yaml | 9 ram: 320
|
| /Zephyr-latest/tests/subsys/logging/log_stack/src/ |
| D | main.c | 196 #define SIMPLE_USAGE 320
197 #define HEXDUMP_USAGE 320
198 #define MORE_ARGS_USAGE 320
216 #define SIMPLE_USAGE 320
217 #define HEXDUMP_USAGE 320
218 #define MORE_ARGS_USAGE 320
|
| /Zephyr-latest/boards/st/nucleo_f413zh/ |
| D | nucleo_f413zh.yaml | 9 ram: 320
|
| /Zephyr-latest/drivers/timer/ |
| D | smartbond_timer.c | 112 * divided by 320. in sys_clock_set_timeout()
114 watchdog_expire_ticks = SYS_WDOG->WATCHDOG_REG * 320; in sys_clock_set_timeout()
118 * divided by 320. In this case watchdog value to LP clock in sys_clock_set_timeout()
123 CONFIG_SYS_CLOCK_TICKS_PER_SEC / (get_rc32k_max_frequency() / 320); in sys_clock_set_timeout()
|
| /Zephyr-latest/boards/st/nucleo_l011k4/ |
| D | nucleo_l011k4_defconfig | 4 CONFIG_MAIN_STACK_SIZE=320
|
| /Zephyr-latest/samples/drivers/display/ |
| D | dummy_dc.overlay | 15 width = <320>;
|
| /Zephyr-latest/tests/lib/gui/lvgl/ |
| D | app.overlay | 15 width = <320>;
|
| /Zephyr-latest/include/zephyr/dt-bindings/ethernet/ |
| D | xlnx_gem.h | 34 #define XLNX_GEM_MDC_DIVIDER_128 6 /* cpu_1x or IOU_SWITCH_CLK 240 - 320 MHz */
35 #define XLNX_GEM_MDC_DIVIDER_224 7 /* cpu_1x or IOU_SWITCH_CLK 320 - 540 MHz */
|
| /Zephyr-latest/soc/nxp/imx/imx9/imx95/ |
| D | Kconfig.defconfig.mimx95.a55 | 16 default 320
|
| /Zephyr-latest/boards/st/stm32f7508_dk/ |
| D | stm32f7508_dk.yaml | 12 ram: 320
|
| /Zephyr-latest/doc/services/debugging/ |
| D | thread-analyzer.rst | 34 idle : STACK: unused 204 usage 116 / 320 (36 %); CPU: 0 %
47 idle : STACK: unused 204 usage 116 / 320 (36 %); CPU: 82 %
60 idle : STACK: unused 204 usage 116 / 320 (36 %); CPU: 83 %
|
| /Zephyr-latest/soc/sifive/sifive_freedom/fe300/ |
| D | clock.c | 23 * - 48 MHz - 320 MHz, in 8 MHz steps (use HFPLL). in soc_early_init_hook()
26 (MHZ(48) <= CORECLK_HZ && MHZ(320) >= CORECLK_HZ && in soc_early_init_hook()
|
| /Zephyr-latest/boards/nxp/frdm_mcxn947/ |
| D | frdm_mcxn947_mcxn947_cpu0.yaml | 11 ram: 320
|
| D | frdm_mcxn947_mcxn947_cpu0_qspi.yaml | 11 ram: 320
|
| /Zephyr-latest/boards/sifive/hifive1/support/ |
| D | hifive1.resc | 20 cpu PerformanceInMips 320
|
| /Zephyr-latest/samples/sensor/vcnl4040/boards/ |
| D | adafruit_feather_stm32f405.overlay | 13 led-duty-cycle = <320>;
|
| /Zephyr-latest/dts/arm/st/f4/ |
| D | stm32f413Xg.dtsi | 12 reg = <0x20000000 DT_SIZE_K(320)>;
|
| D | stm32f413Xh.dtsi | 12 reg = <0x20000000 DT_SIZE_K(320)>;
|
1234567
