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/Zephyr-latest/samples/drivers/video/capture/boards/
Desp32s3_eye_procpu.conf9 CONFIG_VIDEO_FRAME_HEIGHT=240
10 CONFIG_VIDEO_FRAME_WIDTH=240
/Zephyr-latest/samples/drivers/video/capture_to_lvgl/
DREADME.rst49 [00:00:02.780,000] <inf> main: RGBP width [240; 240; 0] height [160; 160; 0]
50 [00:00:02.780,000] <inf> main: RGBP width [320; 320; 0] height [240; 240; 0]
59 [00:00:02.780,000] <inf> main: JPEG width [240; 240; 0] height [160; 160; 0]
60 [00:00:02.780,000] <inf> main: JPEG width [320; 320; 0] height [240; 240; 0]
/Zephyr-latest/drivers/sensor/sensirion/shtcx/
Dshtcx.h23 #define SHTCX_POWER_UP_TIME_US 240U
24 /* Soft reset time is 230us for shtc1 and 240us for shtc3 */
25 #define SHTCX_SOFT_RESET_TIME_US 240U
/Zephyr-latest/dts/bindings/display/
Dgalaxycore,gc9x01x.yaml12 - GC9101A: (Waveshare 240x240, 1.28inch round lcd display 240x240)
31 width = <240>;
32 height = <240>;
/Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32h5_core/boards/
Dpll_csi_240.overlay17 /* Test another couple of M-div N-mul to obtain 240MHz from the CSI */
30 clock-frequency = <DT_FREQ_M(240)>;
/Zephyr-latest/tests/subsys/logging/log_stack/src/
Dmain.c156 #define SIMPLE_USAGE 240
157 #define HEXDUMP_USAGE 240
158 #define MORE_ARGS_USAGE 240
177 #define HEXDUMP_USAGE 240
178 #define MORE_ARGS_USAGE 240
208 #define SIMPLE_USAGE 240
209 #define HEXDUMP_USAGE 240
/Zephyr-latest/samples/arch/smp/pi/
DREADME.rst4 Calculate the first 240 digits of Pi on multiple execution units.
40 Calculate first 240 digits of Pi independently by 16 threads.
/Zephyr-latest/tests/net/socket/offload_dispatcher/
Dtestcase.yaml3 min_flash: 240
/Zephyr-latest/soc/brcm/bcmvk/viper/
DKconfig.defconfig.viper_bcm58402_m77 default 240
/Zephyr-latest/soc/brcm/bcmvk/valkyrie/
DKconfig.defconfig9 default 240
/Zephyr-latest/tests/modules/uoscore/
Dtestcase.yaml3 min_flash: 240
/Zephyr-latest/tests/subsys/display/cfb/basic/src/
Dclear.c52 zassert_false(verify_color_inside_rect(0, 0, 320, 240, 0x0)); in ZTEST()
59 zassert_true(verify_color_inside_rect(0, 0, 320, 240, 0x0)); in ZTEST()
/Zephyr-latest/soc/nxp/layerscape/ls1046a/
DKconfig.defconfig10 default 240
/Zephyr-latest/soc/rockchip/rk3399/
DKconfig.defconfig.rk339910 default 240
/Zephyr-latest/soc/rockchip/rk3568/
DKconfig.defconfig.rk356814 default 240
/Zephyr-latest/boards/shields/st7789v_generic/
Dst7789v_waveshare_240x240.overlay28 width = <240>;
29 height = <240>;
/Zephyr-latest/dts/arm/gd/gd32f4xx/
Dgd32f470.dtsi10 clock-frequency = <DT_FREQ_M(240)>;
/Zephyr-latest/soc/aspeed/ast10x0/
DKconfig.defconfig.ast10308 default 240
/Zephyr-latest/samples/drivers/display/
Ddummy_dc.overlay14 height = <240>;
/Zephyr-latest/tests/lib/gui/lvgl/
Dapp.overlay14 height = <240>;
/Zephyr-latest/include/zephyr/dt-bindings/ethernet/
Dxlnx_gem.h33 #define XLNX_GEM_MDC_DIVIDER_96 5 /* cpu_1x or IOU_SWITCH_CLK 160 - 240 MHz */
34 #define XLNX_GEM_MDC_DIVIDER_128 6 /* cpu_1x or IOU_SWITCH_CLK 240 - 320 MHz */
/Zephyr-latest/soc/nxp/imx/imx9/imx93/
DKconfig.defconfig.mimx93.a5516 default 240
/Zephyr-latest/soc/nxp/imx/imx8m/
DKconfig.defconfig.mimx8ml8_a5316 default 240
DKconfig.defconfig.mimx8mm6_a5316 default 240
DKconfig.defconfig.mimx8mn6_a5316 default 240

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