Home
last modified time | relevance | path

Searched full:21 (Results 1 – 25 of 1018) sorted by relevance

12345678910>>...41

/Zephyr-latest/samples/modules/cmsis_dsp/moving_average/
Dsample.yaml38 - "Input\\[21\\]: 12 13 14 15 16 17 18 19 20 21 | Output\\[21\\]: 16.50"
39 - "Input\\[22\\]: 13 14 15 16 17 18 19 20 21 22 | Output\\[22\\]: 17.50"
40 - "Input\\[23\\]: 14 15 16 17 18 19 20 21 22 23 | Output\\[23\\]: 18.50"
41 - "Input\\[24\\]: 15 16 17 18 19 20 21 22 23 24 | Output\\[24\\]: 19.50"
42 - "Input\\[25\\]: 16 17 18 19 20 21 22 23 24 25 | Output\\[25\\]: 20.50"
43 - "Input\\[26\\]: 17 18 19 20 21 22 23 24 25 26 | Output\\[26\\]: 21.50"
44 - "Input\\[27\\]: 18 19 20 21 22 23 24 25 26 27 | Output\\[27\\]: 22.50"
45 - "Input\\[28\\]: 19 20 21 22 23 24 25 26 27 28 | Output\\[28\\]: 23.50"
46 - "Input\\[29\\]: 20 21 22 23 24 25 26 27 28 29 | Output\\[29\\]: 24.50"
47 - "Input\\[30\\]: 21 22 23 24 25 26 27 28 29 30 | Output\\[30\\]: 25.50"
/Zephyr-latest/tests/net/lib/dns_dispatcher/
Dtestcase.yaml6 min_ram: 21
13 min_ram: 21
/Zephyr-latest/boards/phytec/reel_board/
Dreel_board_nrf52840_2-pinctrl.dtsi11 <NRF_PSEL(SPIM_MISO, 0, 21)>;
19 <NRF_PSEL(SPIM_MISO, 0, 21)>;
Dreel_board-pinctrl.dtsi11 <NRF_PSEL(SPIM_MISO, 0, 21)>;
19 <NRF_PSEL(SPIM_MISO, 0, 21)>;
/Zephyr-latest/boards/nordic/nrf9160dk/dts/nrf9160/
Dnrf9160dk_uart1_on_if0_3.dtsi12 <NRF_PSEL(UART_RTS, 0, 21)>,
21 <NRF_PSEL(UART_RTS, 0, 21)>,
/Zephyr-latest/samples/userspace/shared_mem/src/
Dmain.h54 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25}
56 17, 18, 19, 20, 21, 22, 23, 24, 25, 5, 0, 4, 1, 3, 2}
58 15, 14, 17, 16, 19, 18, 21, 20, 23, 22, 25, 24}
/Zephyr-latest/boards/u-blox/ubx_bmd380eval/
Dubx_bmd380eval_nrf52840-pinctrl.dtsi93 <NRF_PSEL(SPIM_MISO, 0, 21)>;
101 <NRF_PSEL(SPIM_MISO, 0, 21)>;
110 <NRF_PSEL(QSPI_IO1, 0, 21)>,
121 <NRF_PSEL(QSPI_IO1, 0, 21)>,
/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/
Desp32c3-pinctrl.h55 #define I2C0_SCL_GPIO21 ESP32_PINMUX(21, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
100 #define I2C0_SDA_GPIO21 ESP32_PINMUX(21, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
145 #define I2S_I_BCK_GPIO21 ESP32_PINMUX(21, ESP_I2SI_BCK_IN, ESP_I2SI_BCK_OUT)
190 #define I2S_I_SD_GPIO21 ESP32_PINMUX(21, ESP_I2SI_SD_IN, ESP_NOSIG)
235 #define I2S_I_WS_GPIO21 ESP32_PINMUX(21, ESP_I2SI_WS_IN, ESP_I2SI_WS_OUT)
280 #define I2S_MCLK_GPIO21 ESP32_PINMUX(21, ESP_I2S_MCLK_IN, ESP_I2S_MCLK_OUT)
325 #define I2S_O_BCK_GPIO21 ESP32_PINMUX(21, ESP_I2SO_BCK_IN, ESP_I2SO_BCK_OUT)
370 #define I2S_O_SD_GPIO21 ESP32_PINMUX(21, ESP_NOSIG, ESP_I2SO_SD_OUT)
415 #define I2S_O_WS_GPIO21 ESP32_PINMUX(21, ESP_I2SO_WS_IN, ESP_I2SO_WS_OUT)
460 #define LEDC_CH0_GPIO21 ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
[all …]
Desp32c6-pinctrl.h77 ESP32_PINMUX(21, ESP_I2CEXT0_SCL_IN, ESP_I2CEXT0_SCL_OUT)
150 ESP32_PINMUX(21, ESP_I2CEXT0_SDA_IN, ESP_I2CEXT0_SDA_OUT)
201 #define LEDC_CH0_GPIO21 ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT0)
250 #define LEDC_CH1_GPIO21 ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT1)
299 #define LEDC_CH2_GPIO21 ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT2)
348 #define LEDC_CH3_GPIO21 ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT3)
397 #define LEDC_CH4_GPIO21 ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT4)
446 #define LEDC_CH5_GPIO21 ESP32_PINMUX(21, ESP_NOSIG, ESP_LEDC_LS_SIG_OUT5)
495 #define MCPWM0_CAP0_GPIO21 ESP32_PINMUX(21, ESP_PWM0_CAP0_IN, ESP_NOSIG)
544 #define MCPWM0_CAP1_GPIO21 ESP32_PINMUX(21, ESP_PWM0_CAP1_IN, ESP_NOSIG)
[all …]
/Zephyr-latest/soc/intel/apollo_lake/
Dsoc_gpio.h44 #define APL_GPIO_21 21
78 #define APL_GPIO_65 21
128 #define APL_GPIO_PMC_SPI_RXD 21
162 #define APL_GPIO_97 21
211 #define APL_GPIO_151 21
262 #define APL_GPIO_179 21
/Zephyr-latest/soc/ite/ec/it8xxx2/
Dilm.c198 SCAR_REG(21), SCAR_REG(21), SCAR_REG(21), SCAR_REG(21),
199 SCAR_REG(21), SCAR_REG(21), SCAR_REG(21), SCAR_REG(21),
/Zephyr-latest/boards/seeed/xiao_ble/
Dxiao_ble-pinctrl.dtsi103 psels = <NRF_PSEL(SPIM_SCK, 0, 21)>,
111 psels = <NRF_PSEL(SPIM_SCK, 0, 21)>,
120 psels = <NRF_PSEL(QSPI_SCK, 0, 21)>,
131 psels = <NRF_PSEL(QSPI_SCK, 0, 21)>,
/Zephyr-latest/dts/arm/microchip/
Dmec172x_common.dtsi30 direct-capable-girqs = <13 14 15 16 17 18 19 20 21 23>;
44 16 17 18 21 22 24 25
55 16 17 18 19 20 21 22 23
66 16 17 18 19 20 21 22 23
77 16 17 18 19 20 21 22 23
88 16 17 18 19 20 21 22 23
133 16 17 20 21 22 23>;
142 10 20 21 22 23
194 20 21 22 23 24 25 26 27>;
286 girqs = <21 2>;
[all …]
/Zephyr-latest/include/zephyr/dt-bindings/clock/
Dgd32a50x-clocks.h40 #define GD32_CLOCK_GPIOE GD32_CLOCK_CONFIG(AHBEN, 21U)
51 #define GD32_CLOCK_I2C0 GD32_CLOCK_CONFIG(APB1EN, 21U)
67 #define GD32_CLOCK_TIMER20 GD32_CLOCK_CONFIG(APB2EN, 21U)
/Zephyr-latest/include/zephyr/dt-bindings/reset/
Dgd32a50x.h41 #define GD32_RESET_GPIOE GD32_RESET_CONFIG(AHBRST, 21U)
52 #define GD32_RESET_I2C0 GD32_RESET_CONFIG(APB1RST, 21U)
68 #define GD32_RESET_TIMER20 GD32_RESET_CONFIG(APB2RST, 21U)
/Zephyr-latest/dts/bindings/gpio/
Dparticle-gen3-header.yaml18 from the bottom; and pins 9 through 21 correspond to pins on the
23 21 RESETn
Darduino-nano-header-r3.yaml16 through 13 correspond to D0 through D13, and parent pins 14 through 21
23 2 D2 A7/D21 21
Dti,boosterpack-header.yaml14 numbered 1 through 20. The inner rows of the 40 pin variant are numbered 21
17 1 3.3V 21 5V 40 GPIO 20 GND
Darduino-header-r3.yaml24 through 5 correspond to A0 through A5, and parent pins 6 through 21
27 D15 21
Darduino-mkr-header.yaml18 through 14 correspond to D0 through D21, and parent pins 15 through 21
28 21 A6/D21 D12/SCL 12
/Zephyr-latest/tests/bluetooth/gap/src/
Dmain.c26 zassert_equal(BT_GAP_ADV_INTERVAL_TO_MS(0x0022U), 21U); in ZTEST()
56 zassert_equal(BT_GAP_MS_TO_ADV_INTERVAL(21U), 0x0021U); in ZTEST()
88 zassert_equal(BT_GAP_MS_TO_SCAN_INTERVAL(21U), 0x0021U); in ZTEST()
100 zassert_equal(BT_GAP_MS_TO_SCAN_WINDOW(21U), 0x0021U); in ZTEST()
132 zassert_equal(BT_GAP_MS_TO_CONN_EVENT_LEN(21U), 0x0021U); in ZTEST()
/Zephyr-latest/boards/particle/argon/dts/
Dmesh_feather-pinctrl.dtsi26 <NRF_PSEL(SPIM_MISO, 0, 21)>;
34 <NRF_PSEL(SPIM_MISO, 0, 21)>;
/Zephyr-latest/boards/particle/boron/dts/
Dmesh_feather-pinctrl.dtsi26 <NRF_PSEL(SPIM_MISO, 0, 21)>;
34 <NRF_PSEL(SPIM_MISO, 0, 21)>;
/Zephyr-latest/boards/particle/xenon/dts/
Dmesh_feather-pinctrl.dtsi26 <NRF_PSEL(SPIM_MISO, 0, 21)>;
34 <NRF_PSEL(SPIM_MISO, 0, 21)>;
/Zephyr-latest/samples/drivers/mbox/
Dsample.yaml99 - "Ping \\(on channel 21\\)"
117 - "Ping \\(on channel 21\\)"
134 - "Ping \\(on channel 21\\)"

12345678910>>...41