Searched full:160 (Results 1 – 25 of 212) sorted by relevance
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47 [00:00:02.779,000] <inf> main: RGBP width [160; 160; 0] height [120; 120; 0]49 [00:00:02.780,000] <inf> main: RGBP width [240; 240; 0] height [160; 160; 0]57 [00:00:02.780,000] <inf> main: JPEG width [160; 160; 0] height [120; 120; 0]59 [00:00:02.780,000] <inf> main: JPEG width [240; 240; 0] height [160; 160; 0]67 [00:00:02.852,000] <inf> main: - Format: RGBP 160x120 320
12 sector-count = <160>;19 sector-count = <160>;
34 complex product calculation OK after 50 (high) + 63297 (low) tests (computed -160)35 complex product calculation OK after 150 (high) + 188138 (low) tests (computed -160)36 complex product calculation OK after 250 (high) + 312972 (low) tests (computed -160)37 complex product calculation OK after 350 (high) + 437806 (low) tests (computed -160)38 complex product calculation OK after 450 (high) + 562639 (low) tests (computed -160)
14 CONFIG_NET_BUF_RX_COUNT=16015 CONFIG_NET_BUF_TX_COUNT=160
47 CONFIG_NET_BUF_RX_COUNT=16048 CONFIG_NET_BUF_TX_COUNT=160
32 - 16044 - 16080 - 160
9 ram: 160
10 CONFIG_VIDEO_WIDTH=160
19 ram: 160
18 ram: 160
22 ram: 160
12 sector-count = <160>;
32 #define XLNX_GEM_MDC_DIVIDER_64 4 /* cpu_1x or IOU_SWITCH_CLK 120 - 160 MHz */33 #define XLNX_GEM_MDC_DIVIDER_96 5 /* cpu_1x or IOU_SWITCH_CLK 160 - 240 MHz */
13 default 160 if SOC_MIMXRT1052 || \
12 reg = <0x20000000 DT_SIZE_K(160)>;
48 /* Adjust the pll for a SYSTEM Clock of 160 MHz */61 clock-frequency = <DT_FREQ_M(160)>;
12 Your application may be affected by the anomaly 160 that concerns the
