| /mcuboot-3.5.0/boot/cypress/platforms/PSOC_062_2M/CM4/GCC_ARM/ |
| D | startup_psoc6_02_cm4.S | 96 .long ioss_interrupts_gpio_1_IRQHandler /* GPIO Port Interrupt #1 */
119 …ong cpuss_interrupts_ipc_1_IRQHandler /* CPUSS Inter Process Communication Interrupt #1 */
135 .long scb_1_interrupt_IRQHandler /* Serial Communication Block #1 */
148 .long cpuss_interrupts_dmac_1_IRQHandler /* CPUSS DMAC, Channel #1 */
152 .long cpuss_interrupts_dw0_1_IRQHandler /* CPUSS DataWire #0, Channel #1 */
180 .long cpuss_interrupts_dw1_0_IRQHandler /* CPUSS DataWire #1, Channel #0 */
181 .long cpuss_interrupts_dw1_1_IRQHandler /* CPUSS DataWire #1, Channel #1 */
182 .long cpuss_interrupts_dw1_2_IRQHandler /* CPUSS DataWire #1, Channel #2 */
183 .long cpuss_interrupts_dw1_3_IRQHandler /* CPUSS DataWire #1, Channel #3 */
184 .long cpuss_interrupts_dw1_4_IRQHandler /* CPUSS DataWire #1, Channel #4 */
[all …]
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| /mcuboot-3.5.0/boot/bootutil/include/bootutil/ |
| D | caps.h | 36 #define BOOTUTIL_CAP_RSA2048 (1<<0)
37 /* reserved (1<<1) */
38 #define BOOTUTIL_CAP_ECDSA_P256 (1<<2)
39 #define BOOTUTIL_CAP_SWAP_USING_SCRATCH (1<<3)
40 #define BOOTUTIL_CAP_OVERWRITE_UPGRADE (1<<4)
41 #define BOOTUTIL_CAP_ENC_RSA (1<<5)
42 #define BOOTUTIL_CAP_ENC_KW (1<<6)
43 #define BOOTUTIL_CAP_VALIDATE_PRIMARY_SLOT (1<<7)
44 #define BOOTUTIL_CAP_RSA3072 (1<<8)
45 #define BOOTUTIL_CAP_ED25519 (1<<9)
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| /mcuboot-3.5.0/sim/src/ |
| D | caps.rs | 13 RSA2048 = (1 << 0),
14 /* reserved (1 << 1) */
15 EcdsaP256 = (1 << 2),
16 SwapUsingScratch = (1 << 3),
17 OverwriteUpgrade = (1 << 4),
18 EncRsa = (1 << 5),
19 EncKw = (1 << 6),
20 ValidatePrimarySlot = (1 << 7),
21 RSA3072 = (1 << 8),
22 Ed25519 = (1 << 9),
[all …]
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| /mcuboot-3.5.0/boot/mynewt/mcuboot_config/include/mcuboot_config/ |
| D | mcuboot_config.h | 27 #define MCUBOOT_IMAGE_NUMBER 1
33 #define MCUBOOT_SERIAL 1
36 #define MCUBOOT_BOOT_MGMT_ECHO 1
39 #define MCUBOOT_VALIDATE_PRIMARY_SLOT 1
42 #define MCUBOOT_USE_MBED_TLS 1
45 #define MCUBOOT_USE_TINYCRYPT 1
48 #define MCUBOOT_SIGN_EC256 1
51 #define MCUBOOT_SIGN_RSA 1
55 #define MCUBOOT_SIGN_ED25519 1
58 #define MCUBOOT_ENCRYPT_RSA 1
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| /mcuboot-3.5.0/ext/mbedtls-asn1/include/mbedtls/ |
| D | oid.h | 49 #define MBEDTLS_OID_X509_EXT_AUTHORITY_KEY_IDENTIFIER (1 << 0)
50 #define MBEDTLS_OID_X509_EXT_SUBJECT_KEY_IDENTIFIER (1 << 1)
51 #define MBEDTLS_OID_X509_EXT_KEY_USAGE (1 << 2)
52 #define MBEDTLS_OID_X509_EXT_CERTIFICATE_POLICIES (1 << 3)
53 #define MBEDTLS_OID_X509_EXT_POLICY_MAPPINGS (1 << 4)
54 #define MBEDTLS_OID_X509_EXT_SUBJECT_ALT_NAME (1 << 5)
55 #define MBEDTLS_OID_X509_EXT_ISSUER_ALT_NAME (1 << 6)
56 #define MBEDTLS_OID_X509_EXT_SUBJECT_DIRECTORY_ATTRS (1 << 7)
57 #define MBEDTLS_OID_X509_EXT_BASIC_CONSTRAINTS (1 << 8)
58 #define MBEDTLS_OID_X509_EXT_NAME_CONSTRAINTS (1 << 9)
[all …]
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| D | asn1.h | 4 * \brief Generic ASN.1 parsing
52 …F_TOO_SMALL -0x006C /**< Buffer too small when writing ASN.1 data structure. */
58 * These constants comply with the DER encoded ASN.1 type tags.
92 ( ( 1u << ( tag ) ) & ( ( 1u << MBEDTLS_ASN1_BMP_STRING ) | \
93 ( 1u << MBEDTLS_ASN1_UTF8_STRING ) | \
94 ( 1u << MBEDTLS_ASN1_T61_STRING ) | \
95 ( 1u << MBEDTLS_ASN1_IA5_STRING ) | \
96 ( 1u << MBEDTLS_ASN1_UNIVERSAL_STRING ) | \
97 ( 1u << MBEDTLS_ASN1_PRINTABLE_STRING ) | \
98 ( 1u << MBEDTLS_ASN1_BIT_STRING ) ) ) != 0 ) )
[all …]
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| /mcuboot-3.5.0/boot/cypress/platforms/ |
| D | cycfg_system.h | 41 #define cpuss_0_dap_0_ENABLED 1U
42 #define srss_0_clock_0_ENABLED 1U
43 #define srss_0_clock_0_altsystickclk_0_ENABLED 1U
44 #define srss_0_clock_0_bakclk_0_ENABLED 1U
45 #define srss_0_clock_0_fastclk_0_ENABLED 1U
46 #define srss_0_clock_0_fll_0_ENABLED 1U
47 #define srss_0_clock_0_hfclk_0_ENABLED 1U
49 #define srss_0_clock_0_hfclk_2_ENABLED 1U
51 #define srss_0_clock_0_hfclk_3_ENABLED 1U
53 #define srss_0_clock_0_hfclk_4_ENABLED 1U
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| D | cycfg_system.c | 29 #define CY_CFG_SYSCLK_ECO_ERROR 1
34 #define CY_CFG_SYSCLK_CLKALTSYSTICK_ENABLED 1
35 #define CY_CFG_SYSCLK_CLKBAK_ENABLED 1
36 #define CY_CFG_SYSCLK_CLKFAST_ENABLED 1
37 #define CY_CFG_SYSCLK_FLL_ENABLED 1
38 #define CY_CFG_SYSCLK_CLKHF0_ENABLED 1
41 #define CY_CFG_SYSCLK_CLKHF2_ENABLED 1
44 #define CY_CFG_SYSCLK_CLKHF3_ENABLED 1
47 #define CY_CFG_SYSCLK_CLKHF4_ENABLED 1
50 #define CY_CFG_SYSCLK_ILO_ENABLED 1
[all …]
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| /mcuboot-3.5.0/boot/espressif/port/esp32s2/ |
| D | bootloader.conf | 30 # GPIO input type (0 for Pull-down, 1 for Pull-up)
33 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
37 # CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
67 # CONFIG_SECURE_SIGNED_ON_BOOT=1
68 # CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
69 # CONFIG_SECURE_BOOT=1
70 # CONFIG_SECURE_BOOT_V2_ENABLED=1
71 # CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
74 # CONFIG_SECURE_FLASH_ENC_ENABLED=1
75 # CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
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| /mcuboot-3.5.0/boot/espressif/port/esp32c2/ |
| D | bootloader.conf | 30 # GPIO input type (0 for Pull-down, 1 for Pull-up)
33 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
37 # CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
67 # CONFIG_SECURE_SIGNED_ON_BOOT=1
68 # CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME=1
69 # CONFIG_SECURE_BOOT=1
70 # CONFIG_SECURE_BOOT_V2_ENABLED=1
73 # CONFIG_SECURE_FLASH_ENC_ENABLED=1
74 # CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
75 # CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1
[all …]
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| /mcuboot-3.5.0/boot/espressif/port/esp32c3/ |
| D | bootloader.conf | 32 # GPIO input type (0 for Pull-down, 1 for Pull-up)
35 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
39 # CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
71 # CONFIG_SECURE_SIGNED_ON_BOOT=1
72 # CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
73 # CONFIG_SECURE_BOOT=1
74 # CONFIG_SECURE_BOOT_V2_ENABLED=1
75 # CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
78 # CONFIG_SECURE_FLASH_ENC_ENABLED=1
79 # CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
[all …]
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| /mcuboot-3.5.0/boot/espressif/port/esp32c6/ |
| D | bootloader.conf | 32 # GPIO input type (0 for Pull-down, 1 for Pull-up)
35 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
39 # CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
71 # CONFIG_SECURE_SIGNED_ON_BOOT=1
72 # CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
73 # CONFIG_SECURE_BOOT=1
74 # CONFIG_SECURE_BOOT_V2_ENABLED=1
75 # CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
78 # CONFIG_SECURE_FLASH_ENC_ENABLED=1
79 # CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
[all …]
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| /mcuboot-3.5.0/boot/espressif/port/esp32h2/ |
| D | bootloader.conf | 32 # GPIO input type (0 for Pull-down, 1 for Pull-up)
35 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
39 # CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
71 # CONFIG_SECURE_SIGNED_ON_BOOT=1
72 # CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
73 # CONFIG_SECURE_BOOT=1
74 # CONFIG_SECURE_BOOT_V2_ENABLED=1
75 # CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
78 # CONFIG_SECURE_FLASH_ENC_ENABLED=1
79 # CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
[all …]
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| /mcuboot-3.5.0/boot/espressif/port/esp32/ |
| D | bootloader.conf | 29 # GPIO input type (0 for Pull-down, 1 for Pull-up)
32 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
36 # CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
84 # CONFIG_SECURE_SIGNED_ON_BOOT=1
85 # CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
86 # CONFIG_SECURE_BOOT=1
87 # CONFIG_SECURE_BOOT_V2_ENABLED=1
88 # CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
91 # CONFIG_SECURE_FLASH_ENC_ENABLED=1
92 # CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
[all …]
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| /mcuboot-3.5.0/boot/espressif/port/esp32s3/ |
| D | bootloader.conf | 52 # GPIO input type (0 for Pull-down, 1 for Pull-up)
55 # CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
59 # CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
91 # CONFIG_SECURE_SIGNED_ON_BOOT=1
92 # CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
93 # CONFIG_SECURE_BOOT=1
94 # CONFIG_SECURE_BOOT_V2_ENABLED=1
95 # CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
98 # CONFIG_SECURE_FLASH_ENC_ENABLED=1
99 # CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
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| /mcuboot-3.5.0/docs/ |
| D | testplan-mynewt.md | 22 * `newt create-image k64f_blinky 1.0.1 key_<sign-algo>.pem`
31 `newt create-image k64f_blinky 1.0.1 key_rsa.pem --rsa-pss`
35 Build and load image in slot 1 with no signing, signed with
43 * `newtmgr image test <hash of slot 1>`
56 * `newt create-image k64f_blinky 1.0.1 key_rsa.pem`
59 Build and load image in slot 1 with no signing, signed with
72 * `newtmgr image test <hash of slot 1>`
83 * `newt create-image k64f_blinky 1.0.1 key_rsa.pem`
92 * `newtmgr image confirm <hash of slot 1>`
94 This should not swap and delete the image in slot 1 when signed with the wrong
[all …]
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| /mcuboot-3.5.0/boot/espressif/ci_configs/ |
| D | secureboot-sign-ed25519.conf | 11 CONFIG_SECURE_SIGNED_ON_BOOT=1
12 CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
13 CONFIG_SECURE_BOOT=1
14 CONFIG_SECURE_BOOT_V2_ENABLED=1
15 CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
16 CONFIG_SECURE_FLASH_ENC_ENABLED=1
17 CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=1
19 CONFIG_ESP_USE_TINYCRYPT=1
20 CONFIG_ESP_SIGN_ED25519=1
21 CONFIG_ESP_DOWNGRADE_PREVENTION=1
[all …]
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| D | secureboot-sign-ec256.conf | 11 CONFIG_SECURE_SIGNED_ON_BOOT=1
12 CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
13 CONFIG_SECURE_BOOT=1
14 CONFIG_SECURE_BOOT_V2_ENABLED=1
15 CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
16 CONFIG_SECURE_FLASH_ENC_ENABLED=1
17 CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=1
19 CONFIG_ESP_USE_TINYCRYPT=1
20 CONFIG_ESP_SIGN_EC256=1
21 CONFIG_ESP_DOWNGRADE_PREVENTION=1
[all …]
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| D | secureboot-sign-rsa2048.conf | 11 CONFIG_SECURE_SIGNED_ON_BOOT=1
12 CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
13 CONFIG_SECURE_BOOT=1
14 CONFIG_SECURE_BOOT_V2_ENABLED=1
15 CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
16 CONFIG_SECURE_FLASH_ENC_ENABLED=1
17 CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=1
19 CONFIG_ESP_USE_MBEDTLS=1
20 CONFIG_ESP_SIGN_RSA=1
22 CONFIG_ESP_DOWNGRADE_PREVENTION=1
[all …]
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| D | secureboot-sign-rsa3072.conf | 11 CONFIG_SECURE_SIGNED_ON_BOOT=1
12 CONFIG_SECURE_SIGNED_APPS_RSA_SCHEME=1
13 CONFIG_SECURE_BOOT=1
14 CONFIG_SECURE_BOOT_V2_ENABLED=1
15 CONFIG_SECURE_BOOT_SUPPORTS_RSA=1
16 CONFIG_SECURE_FLASH_ENC_ENABLED=1
17 CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=1
19 CONFIG_ESP_USE_MBEDTLS=1
20 CONFIG_ESP_SIGN_RSA=1
22 CONFIG_ESP_DOWNGRADE_PREVENTION=1
[all …]
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| /mcuboot-3.5.0/testplan/mynewt/apps/slinky/ |
| D | syscfg.yml | 21 value: 1
24 SHELL_TASK: 1
25 STATS_NAMES: 1
26 REBOOT_LOG_FCB: 1
27 LOG_FCB: 1
28 CONFIG_FCB: 1
29 STATS_CLI: 1
30 LOG_CLI: 1
31 CONFIG_CLI: 1
32 STATS_MGMT: 1
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| /mcuboot-3.5.0/ext/tinycrypt/lib/source/ |
| D | ctr_prng.c | 38 * NIST SP 800-90A Rev. 1.
40 * Annotations to particular steps (e.g. 10.2.1.2 Step 1) refer to the steps
58 if (++arr[i-1] != 0U) { in arrInc()
77 /* 10.2.1.2 step 1 */ in tc_ctr_prng_update()
130 /* 10.2.1.3.1 step 1 */ in tc_ctr_prng_init()
136 /* 10.2.1.3.1 step 2 */ in tc_ctr_prng_init()
141 /* 10.2.1.3.1 step 3 */ in tc_ctr_prng_init()
147 /* 10.2.1.3.1 step 4 */ in tc_ctr_prng_init()
150 /* 10.2.1.3.1 step 5 */ in tc_ctr_prng_init()
153 /* 10.2.1.3.1 step 6 */ in tc_ctr_prng_init()
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| /mcuboot-3.5.0/boot/espressif/hal/include/esp32c2/ |
| D | sdkconfig.h | 7 #define BOOTLOADER_BUILD 1
9 #define CONFIG_IDF_TARGET_ESP32C2 1
10 #define CONFIG_ESP32C2_REV_MIN_0 1
16 #define CONFIG_IDF_TARGET_ARCH_RISCV 1
18 #define CONFIG_XTAL_FREQ_26 1
20 #define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
21 #define CONFIG_MCUBOOT 1
22 #define NDEBUG 1
30 #define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
|
| /mcuboot-3.5.0/boot/espressif/hal/include/esp32h2/ |
| D | sdkconfig.h | 7 #define BOOTLOADER_BUILD 1
9 #define CONFIG_IDF_TARGET_ESP32H2 1
10 #define CONFIG_ESP32H2_REV_MIN_0 1
16 #define CONFIG_IDF_TARGET_ARCH_RISCV 1
19 #define CONFIG_XTAL_FREQ_32 1
21 #define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
22 #define CONFIG_MCUBOOT 1
23 #define NDEBUG 1
31 #define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
|
| /mcuboot-3.5.0/boot/espressif/hal/include/esp32c3/ |
| D | sdkconfig.h | 7 #define BOOTLOADER_BUILD 1
9 #define CONFIG_IDF_TARGET_ESP32C3 1
10 #define CONFIG_ESP32C3_REV_MIN_3 1
16 #define CONFIG_IDF_TARGET_ARCH_RISCV 1
19 #define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
20 #define CONFIG_MCUBOOT 1
21 #define NDEBUG 1
29 #define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
|
