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/Zephyr-Core-3.5.0/tests/lib/gui/lvgl/src/
Dimg.c11 0x00, 0x00, 0x00, 0x00, /* Index color 0 */
12 0x00, 0xff, 0x00, 0x00, /* Index color 1 */
14 /* 0 */
15 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
16 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
17 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
18 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
19 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
20 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
21 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff,
[all …]
/Zephyr-Core-3.5.0/tests/crypto/tinycrypt/src/
Daes.c75 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, in test_aes_key_chain()
76 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c in test_aes_key_chain()
79 0x2b7e1516, 0x28aed2a6, 0xabf71588, 0x09cf4f3c, in test_aes_key_chain()
80 0xa0fafe17, 0x88542cb1, 0x23a33939, 0x2a6c7605, in test_aes_key_chain()
81 0xf2c295f2, 0x7a96b943, 0x5935807a, 0x7359f67f, in test_aes_key_chain()
82 0x3d80477d, 0x4716fe3e, 0x1e237e44, 0x6d7a883b, in test_aes_key_chain()
83 0xef44a541, 0xa8525b7f, 0xb671253b, 0xdb0bad00, in test_aes_key_chain()
84 0xd4d1c6f8, 0x7c839d87, 0xcaf2b8bc, 0x11f915bc, in test_aes_key_chain()
85 0x6d88a37a, 0x110b3efd, 0xdbf98641, 0xca0093fd, in test_aes_key_chain()
86 0x4e54f70e, 0x5f5fc9f3, 0x84a64fb2, 0x4ea6dc4f, in test_aes_key_chain()
[all …]
/Zephyr-Core-3.5.0/drivers/sdhc/
Dsdhc_spi.c26 * 0xff while we read data blocks. Should remain const so this buffer is
30 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
31 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
32 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
33 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
34 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
35 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
36 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
37 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
38 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
[all …]
/Zephyr-Core-3.5.0/drivers/interrupt_controller/
Dintc_sam0_eic_priv.h35 0xFF,
40 0xFF,
45 0xFF,
50 0xFF,
55 0xFF,
60 0xFF,
65 0xFF,
70 0xFF,
75 0xFF,
80 0xFF,
[all …]
/Zephyr-Core-3.5.0/subsys/bluetooth/common/
Daddr.c9 const bt_addr_t bt_addr_any = { { 0, 0, 0, 0, 0, 0 } };
10 const bt_addr_t bt_addr_none = { { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff } };
11 const bt_addr_le_t bt_addr_le_any = { 0, { { 0, 0, 0, 0, 0, 0 } } };
12 const bt_addr_le_t bt_addr_le_none = { 0, { { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff } } };
/Zephyr-Core-3.5.0/tests/lib/cmsis_dsp/filtering/src/
Dfir_q7.pat2 0x00, 0x02, 0x04, 0x03, 0x02, 0xFE, 0xFD, 0xFC,
3 0xFD, 0x00, 0x02, 0x04, 0x03, 0x02, 0xFF, 0xFD,
4 0xFD, 0xFE, 0x00, 0x03, 0x04, 0x04, 0x01, 0xFF,
5 0xFC, 0xFC, 0xFD, 0x01, 0x03, 0x04, 0x03, 0x01,
6 0xFF, 0xFC, 0xFC, 0xFD, 0x00, 0x02, 0x04, 0x03,
7 0x02, 0xFF, 0xFD, 0xFC, 0xFE, 0x00
11 0x2B, 0x40, 0x20, 0x4D, 0x33, 0x1A, 0x55, 0x40,
12 0x2B, 0x15, 0x5B, 0x49, 0x37, 0x25, 0x12, 0x60,
13 0x50, 0x40, 0x30, 0x20, 0x10, 0x64, 0x55, 0x47,
14 0x39, 0x2B, 0x1C, 0x0E, 0x66, 0x5A, 0x4D, 0x40,
[all …]
/Zephyr-Core-3.5.0/soc/arm/nxp_kinetis/
Dflash_configuration.c12 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
14 /* Program flash protection; 1 bit/region - 0=protected, 1=unprotected
16 0xFF, 0xFF, 0xFF, 0xFF,
DKconfig71 range 0 0x18
72 default 0
78 hex "VCO 0 divider"
79 range 0 0x1F
80 default 0
82 Selects the amount to divide the VCO output of the PLL. The VDIV 0 bits
88 range 0 7
96 range 0 7
97 default 0
117 default 0x400
[all …]
/Zephyr-Core-3.5.0/samples/modules/tflite-micro/hello_world/src/
Dmodel.cpp31 0x1c, 0x00, 0x00, 0x00, 0x54, 0x46, 0x4c, 0x33, 0x14, 0x00, 0x20, 0x00,
32 0x1c, 0x00, 0x18, 0x00, 0x14, 0x00, 0x10, 0x00, 0x0c, 0x00, 0x00, 0x00,
33 0x08, 0x00, 0x04, 0x00, 0x14, 0x00, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x00,
34 0x98, 0x00, 0x00, 0x00, 0xc8, 0x00, 0x00, 0x00, 0x1c, 0x03, 0x00, 0x00,
35 0x2c, 0x03, 0x00, 0x00, 0x30, 0x09, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00,
36 0x01, 0x00, 0x00, 0x00, 0x04, 0x00, 0x00, 0x00, 0x60, 0xf7, 0xff, 0xff,
37 0x10, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00, 0x00, 0x28, 0x00, 0x00, 0x00,
38 0x44, 0x00, 0x00, 0x00, 0x05, 0x00, 0x00, 0x00, 0x73, 0x65, 0x72, 0x76,
39 0x65, 0x00, 0x00, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x73, 0x65, 0x72, 0x76,
40 0x69, 0x6e, 0x67, 0x5f, 0x64, 0x65, 0x66, 0x61, 0x75, 0x6c, 0x74, 0x00,
[all …]
/Zephyr-Core-3.5.0/tests/lib/cmsis_dsp/matrix/src/
Dunary_q7.pat2 0xFB, 0x03, 0x09, 0x06, 0xF5, 0x03, 0x08, 0x0C,
3 0xFE, 0xFE, 0x0A, 0x02, 0xFF, 0x0B, 0x00, 0x0B,
4 0x08, 0x00, 0xFF, 0x0A, 0xFD, 0x06, 0x08, 0xF2,
5 0x0B, 0xEC, 0xF8, 0x05, 0xFE, 0x06, 0xE3, 0xF7,
6 0x0D, 0xF7, 0xF1, 0xEE, 0x15, 0xF0, 0xFE, 0x0B,
7 0xFE, 0x19, 0x04, 0x0C, 0x19, 0xFC, 0x05, 0xFB,
8 0xFC, 0x08, 0x10, 0x05, 0xFF, 0xFB, 0xF0, 0xEC,
9 0x01, 0x0C, 0x04, 0xF2, 0xFB, 0x0C, 0x00, 0xFB,
10 0x02, 0x07, 0xFE, 0xFE, 0x08, 0x09, 0xF8, 0x06,
11 0xED, 0xF4, 0xFE, 0x01, 0xFE, 0xFD, 0x07, 0xF9,
[all …]
Dbinary_q7.pat2 0x29, 0xFF, 0x63, 0x16, 0x2D, 0xFC, 0xDA, 0x05,
3 0xDE, 0x22, 0xDE, 0x06, 0x21, 0x11, 0x01, 0xC9,
4 0x29, 0xFC, 0x4B, 0x17, 0xD1, 0x48, 0xF8, 0x08,
5 0xA8, 0xFC, 0x17, 0xFF, 0x12, 0x15, 0x40, 0xC8,
6 0xD0, 0xA0, 0xE2, 0xEB, 0x0D, 0xF9, 0xD1, 0xD8,
7 0xF5, 0x2C, 0x08, 0xF3, 0xD9, 0x03, 0xD7, 0xE8,
8 0xFE, 0x2C, 0x0C, 0xF5, 0x2C, 0x14, 0xFC, 0xFB,
9 0xEE, 0x0C, 0xFC, 0x15, 0xD9, 0xE6, 0xFA, 0xF5,
10 0x10, 0x11, 0x0F, 0x13, 0xC9, 0xEF, 0x1C, 0xCB,
11 0xD5, 0xCA, 0x18, 0xF9, 0xFC, 0x03, 0xBA, 0x46,
[all …]
/Zephyr-Core-3.5.0/subsys/net/l2/ethernet/lldp/
DKconfig74 hex "Chassis ID MAC Address Byte 0"
75 default 0x00
76 range 0 0xff
78 Byte 0 of the MAC address.
82 default 0x00
83 range 0 0xff
89 default 0x5e
90 range 0 0xff
96 default 0x00
97 range 0 0xff
[all …]
/Zephyr-Core-3.5.0/drivers/disk/
Dsdmmc_sdhc.h25 #define SDHC_GO_IDLE_STATE 0
64 #define SDHC_R1_IDLE 0x01
65 #define SDHC_R1_ERASE_RESET 0x02
66 #define SDHC_R1_ILLEGAL_COMMAND 0x04
67 #define SDHC_R1_COM_CRC 0x08
68 #define SDHC_R1_ERASE_SEQ 0x10
69 #define SDHC_R1_ADDRESS 0x20
70 #define SDHC_R1_PARAMETER 0x40
77 #define SDHC_START 0x80
78 #define SDHC_TX 0x40
[all …]
/Zephyr-Core-3.5.0/samples/drivers/led_lp5562/src/
Dmain.c30 #define LED_B 0
36 { 0xFF, 0x00, 0x00 }, /*< Red */
37 { 0x00, 0xFF, 0x00 }, /*< Green */
38 { 0x00, 0x00, 0xFF }, /*< Blue */
39 { 0xFF, 0xFF, 0xFF }, /*< White */
40 { 0xFF, 0xFF, 0x00 }, /*< Yellow */
41 { 0xFF, 0x00, 0xFF }, /*< Purple */
42 { 0x00, 0xFF, 0xFF }, /*< Cyan */
43 { 0xF4, 0x79, 0x20 }, /*< Orange */
47 * @brief scale hex values [0x00..0xFF] to percent [0..100].
[all …]
/Zephyr-Core-3.5.0/subsys/fb/
Dcfb_fonts.c20 0x00, 0x00,
21 0x00, 0x00,
22 0x00, 0x00,
23 0x00, 0x00,
24 0x00, 0x00,
25 0x00, 0x00,
26 0x00, 0x00,
27 0x00, 0x00,
28 0x00, 0x00,
29 0x00, 0x00,
[all …]
/Zephyr-Core-3.5.0/tests/drivers/sdhc/src/
Dmain.c26 zassert_equal(ret, 0, "SDHC HW reset failed"); in ZTEST()
34 /* Set all host properties to 0xFF */ in ZTEST()
35 props.f_max = 0xFF; in ZTEST()
36 props.f_min = 0xFF; in ZTEST()
37 props.power_delay = 0xFF; in ZTEST()
38 props.max_current_330 = 0xFF; in ZTEST()
39 props.max_current_300 = 0xFF; in ZTEST()
40 props.max_current_180 = 0xFF; in ZTEST()
42 zassert_equal(ret, 0, "SDHC host props api call failed"); in ZTEST()
44 zassert_not_equal(props.f_max, 0xFF, "props structure not initialized"); in ZTEST()
[all …]
/Zephyr-Core-3.5.0/subsys/bluetooth/controller/ll_sw/
Dull_chan.c42 static uint8_t map[5] = {0xFF, 0xFF, 0xFF, 0xFF, 0x1F};
55 #if (CONFIG_BT_CTLR_ADV_AUX_SET > 0) in ll_chm_update()
57 #endif /*(CONFIG_BT_CTLR_ADV_AUX_SET > 0) */ in ll_chm_update()
70 return 0; in ll_chm_update()
76 map[0] = 0xFF; in ull_chan_reset()
77 map[1] = 0xFF; in ull_chan_reset()
78 map[2] = 0xFF; in ull_chan_reset()
79 map[3] = 0xFF; in ull_chan_reset()
80 map[4] = 0x1F; in ull_chan_reset()
83 return 0; in ull_chan_reset()
/Zephyr-Core-3.5.0/drivers/ieee802154/
DKconfig.uart_pipe29 default 0
30 range 0 0xff
36 default 0
37 range 0 0xff
43 default 0
44 range 0 0xff
50 default 0
51 range 0 0xff
DKconfig.b9143 default 0
44 range 0 0xff
50 default 0
51 range 0 0xff
57 default 0
58 range 0 0xff
64 default 0
65 range 0 0xff
/Zephyr-Core-3.5.0/boards/arm/mm_feather/
Dmmfeather_sdram_ini_dcd.c20 0xD2,
22 0x04, 0x30,
24 0x41,
26 0xCC, 0x03, 0xAC, 0x04,
28 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF,
30 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF,
32 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF,
34 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF,
36 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF,
38 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF,
[all …]
/Zephyr-Core-3.5.0/boards/arm/mm_swiftio/
Dmmswiftio_sdram_ini_dcd.c20 0xD2,
22 0x04, 0x30,
24 0x41,
26 0xCC, 0x03, 0xAC, 0x04,
28 0x40, 0x0F, 0xC0, 0x68, 0xFF, 0xFF, 0xFF, 0xFF,
30 0x40, 0x0F, 0xC0, 0x6C, 0xFF, 0xFF, 0xFF, 0xFF,
32 0x40, 0x0F, 0xC0, 0x70, 0xFF, 0xFF, 0xFF, 0xFF,
34 0x40, 0x0F, 0xC0, 0x74, 0xFF, 0xFF, 0xFF, 0xFF,
36 0x40, 0x0F, 0xC0, 0x78, 0xFF, 0xFF, 0xFF, 0xFF,
38 0x40, 0x0F, 0xC0, 0x7C, 0xFF, 0xFF, 0xFF, 0xFF,
[all …]
/Zephyr-Core-3.5.0/soc/arm/microchip_mec/common/spigen/
Dmec_spi_gen.py13 HDR_SIZE = 0x140
14 HDR_VER_MEC172X = 0x03
15 HDR_VER_MEC152X = 0x02
16 HDR_SPI_CLK_12MHZ = 0x3
17 HDR_SPI_CLK_16MHZ = 0x2
18 HDR_SPI_CLK_24MHZ = 0x1
19 HDR_SPI_CLK_48MHZ = 0
20 HDR_SPI_DRV_STR_1X = 0
21 HDR_SPI_DRV_STR_2X = 0x4
22 HDR_SPI_DRV_STR_4X = 0x8
[all …]
/Zephyr-Core-3.5.0/tests/boot/mcuboot_data_sharing/src/
Dmain.c22 #define RUNNING_SLOT 0
29 memset(var, 0xff, sizeof(var)); in ZTEST()
32 zassert_equal(var[0], MCUBOOT_MODE_SWAP_USING_MOVE, "Expected data mismatch"); in ZTEST()
40 memset(var, 0xff, sizeof(var)); in ZTEST()
43 zassert_equal(var[0], MCUBOOT_SIGNATURE_TYPE_RSA, "Expected data mismatch"); in ZTEST()
51 memset(var, 0xff, sizeof(var)); in ZTEST()
54 zassert_equal(var[0], MCUBOOT_RECOVERY_MODE_NONE, "Expected data mismatch"); in ZTEST()
62 memset(var, 0xff, sizeof(var)); in ZTEST()
65 zassert_equal(var[0], RUNNING_SLOT, "Expected data mismatch"); in ZTEST()
74 memset(var, 0xff, sizeof(var)); in ZTEST()
[all …]
/Zephyr-Core-3.5.0/include/zephyr/sys/
Dbyteorder.h20 #define __bswap_16(x) ((uint16_t) ((((x) >> 8) & 0xff) | (((x) & 0xff) << 8)))
21 #define __bswap_24(x) ((uint32_t) ((((x) >> 16) & 0xff) | \
22 (((x)) & 0xff00) | \
23 (((x) & 0xff) << 16)))
24 #define __bswap_32(x) ((uint32_t) ((((x) >> 24) & 0xff) | \
25 (((x) >> 8) & 0xff00) | \
26 (((x) & 0xff00) << 8) | \
27 (((x) & 0xff) << 24)))
28 #define __bswap_48(x) ((uint64_t) ((((x) >> 40) & 0xff) | \
29 (((x) >> 24) & 0xff00) | \
[all …]
/Zephyr-Core-3.5.0/include/zephyr/dt-bindings/interrupt-controller/
Dmchp-xec-ecia.h11 * g = bits[0:4], GIRQ number in [8, 26]
12 * gb = bits[12:8], peripheral source bit position [0, 31] in the GIRQ
20 (((g) & 0x1f) + (((gb) & 0x1f) << 8) + (((na) & 0xff) << 16) + \
21 (((nd) & 0xff) << 24))
24 #define MCHP_XEC_ECIA_GIRQ(e) ((e) & 0x1f)
25 #define MCHP_XEC_ECIA_GIRQ_POS(e) (((e) >> 8) & 0x1f)
26 #define MCHP_XEC_ECIA_NVIC_AGGR(e) (((e) >> 16) & 0xff)
27 #define MCHP_XEC_ECIA_NVIC_DIRECT(e) (((e) >> 24) & 0xff)

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