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/Zephyr-Core-3.6.0/dts/bindings/mtd/
Datmel,sam-flash.yaml35 reg = <0x400e0a00 0x200>;
45 reg = <0x400000 0x100000>;
69 boot_partition: partition@0 {
71 reg = <0x0 0x10000>;
76 reg = <0x10000 0x70000>;
81 reg = <0x80000 0x70000>;
86 reg = <0xf0000 0x100000>;
/Zephyr-Core-3.6.0/boards/riscv/tlsr9518adk80d/
Dtlsr9518adk80d.dts25 pwm-0 = &pwm0;
56 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
87 reg = <0x00000000 0x00020000>;
91 reg = <0x00080000 0x00020000>;
95 reg = <0x20000000 0x100000>;
102 boot_partition: partition@0 {
104 reg = <0x00000000 0x10000>;
107 label = "image-0";
108 reg = <0x10000 0x70000>;
112 reg = <0x80000 0x70000>;
[all …]
/Zephyr-Core-3.6.0/boards/arm/raytac_mdbt53v_db_40_nrf5340/
Draytac_mdbt53v_db_40_nrf5340_cpuapp_common.dts26 label = "Green LED 0";
33 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
60 gpios = <&gpio1 1 0>, <&gpio1 0 0>, <&gpio0 11 0>, <&gpio0 10 0>;
97 pinctrl-0 = <&i2c1_default>;
105 pinctrl-0 = <&uart0_default>;
113 pinctrl-0 = <&uart1_default>;
120 pinctrl-0 = <&pwm0_default>;
127 pinctrl-0 = <&qspi_default>;
135 cs-gpios = <&gpio0 11 0>;
136 pinctrl-0 = <&spi4_default>;
[all …]
/Zephyr-Core-3.6.0/boards/arm/nrf9160_innblue22/
Dnrf9160_innblue22_common.dtsi45 label = "Button 0";
84 pinctrl-0 = <&uart0_default>;
92 pinctrl-0 = <&uart1_default>;
99 pinctrl-0 = <&uart2_default>;
111 pinctrl-0 = <&i2c2_default>;
116 reg = <0x55>;
125 reg = <0x19>;
126 irq-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>, <&gpio0 1 GPIO_ACTIVE_HIGH>;
131 reg = <0x5f>;
137 reg = <0x5c>;
[all …]
/Zephyr-Core-3.6.0/boards/arm/sparkfun_thing_plus_nrf9160/
Dsparkfun_thing_plus_nrf9160_common.dtsi31 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
68 gpio-map-mask = <0xffffffff 0xffffffc0>;
69 gpio-map-pass-thru = <0 0x3f>;
70 gpio-map = <12 0 &gpio0 26 0>, /* SDA */
71 <13 0 &gpio0 27 0>, /* SCL */
72 <14 0 &gpio0 29 0>, /* PWM3 */
73 <15 0 &gpio0 30 0>, /* PWM3 */
74 <16 0 &gpio0 0 0>, /* PWM1 */
75 <17 0 &gpio0 1 0>, /* PWM1 */
76 <18 0 &gpio0 2 0>, /* PWM1 */
[all …]
/Zephyr-Core-3.6.0/boards/arm/circuitdojo_feather_nrf9160/
Dcircuitdojo_feather_nrf9160_common.dtsi31 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
61 gpio-map-mask = <0xffffffff 0xffffffc0>;
62 gpio-map-pass-thru = <0 0x3f>;
63 gpio-map = <12 0 &gpio0 26 0>, /* SDA */
64 <13 0 &gpio0 27 0>, /* SCL */
65 <14 0 &gpio0 29 0>, /* PWM3 */
66 <15 0 &gpio0 30 0>, /* PWM3 */
67 <16 0 &gpio0 0 0>, /* PWM1 */
68 <17 0 &gpio0 1 0>, /* PWM1 */
69 <18 0 &gpio0 2 0>, /* PWM1 */
[all …]
/Zephyr-Core-3.6.0/boards/arm/nrf9160dk_nrf9160/
Dnrf9160dk_nrf9160_common.dtsi22 gpios = <&gpio0 2 0>;
26 gpios = <&gpio0 3 0>;
30 gpios = <&gpio0 4 0>;
34 gpios = <&gpio0 5 0>;
42 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
80 gpio-map-mask = <0xf 0>;
81 gpio-map-pass-thru = <0 0xffffffff>;
82 gpio-map = <0 0 &gpio0 17 0>,
83 <1 0 &gpio0 18 0>,
84 <2 0 &gpio0 19 0>,
[all …]
/Zephyr-Core-3.6.0/boards/arm/nrf5340dk_nrf5340/
Dnrf5340_cpuapp_common.dtsi26 label = "Green LED 0";
45 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
76 gpio-map-mask = <0xffffffff 0xffffffc0>;
77 gpio-map-pass-thru = <0 0x3f>;
78 gpio-map = <0 0 &gpio0 4 0>, /* A0 */
79 <1 0 &gpio0 5 0>, /* A1 */
80 <2 0 &gpio0 6 0>, /* A2 */
81 <3 0 &gpio0 7 0>, /* A3 */
82 <4 0 &gpio0 25 0>, /* A4 */
83 <5 0 &gpio0 26 0>, /* A5 */
[all …]
/Zephyr-Core-3.6.0/boards/arm/pan1783/
Dpan1783_cpuapp_common.dtsi45 pwms = <&pwm0 0 PWM_MSEC(20) PWM_POLARITY_INVERTED>;
76 gpio-map-mask = <0xffffffff 0xffffffc0>;
77 gpio-map-pass-thru = <0 0x3f>;
78 gpio-map = <0 0 &gpio0 4 0>, /* AN */
80 <2 0 &gpio1 12 0>, /* CS */
81 <3 0 &gpio1 15 0>, /* SCK */
82 <4 0 &gpio1 14 0>, /* MISO */
83 <5 0 &gpio1 13 0>, /* MOSI */
86 <6 0 &gpio1 7 0>, /* PWM */
87 <7 0 &gpio1 4 0>, /* INT */
[all …]
/Zephyr-Core-3.6.0/drivers/ethernet/
Deth_smsc911x.c63 while ((SMSC9220->MAC_CSR_CMD & MAC_CSR_CMD_BUSY) != 0) { in smsc_mac_regread()
68 return 0; in smsc_mac_regread()
79 while ((SMSC9220->MAC_CSR_CMD & MAC_CSR_CMD_BUSY) != 0) { in smsc_mac_regwrite()
82 return 0; in smsc_mac_regwrite()
87 uint32_t val = 0U; in smsc_phy_regread()
88 uint32_t phycmd = 0U; in smsc_phy_regread()
91 if (smsc_mac_regread(SMSC9220_MAC_MII_ACC, &val) < 0) { in smsc_phy_regread()
96 *data = 0U; in smsc_phy_regread()
100 phycmd = 0U; in smsc_phy_regread()
102 phycmd |= (regoffset & 0x1F) << 6; in smsc_phy_regread()
[all …]
/Zephyr-Core-3.6.0/doc/develop/flash_debug/
Dhost-tools.rst25 introduced in Zephyr SDK 0.12.0.
85 start from offset 0. It is necessary to define the partitions with sizes that
104 boot_partition: partition@0 {
106 reg = <0x00000000 0x2000>;
112 reg = <0x2000 0x3a000>;
123 reg = <0x0003c000 0x00004000>;
145 code_partition: partition@0 {
147 reg = <0x0 0xF0000>;
158 reg = <0x000F0000 0x00100000>;
/Zephyr-Core-3.6.0/drivers/espi/
Despi_npcx.c56 #define NPCX_ESPI_CH_PC 0
64 #define NPCX_ESPI_MAXFREQ_20 0
74 #define NPCX_OOB_RX_PACKAGE_LEN(hdr) (((hdr & 0xff000000) >> 24) | \
75 ((hdr & 0xf0000) >> 8))
78 #define NPCX_ESPI_FLASH_MAX_RX_PAYLOAD DT_INST_PROP(0, rx_plsize)
79 #define NPCX_ESPI_FLASH_MAX_TX_PAYLOAD DT_INST_PROP(0, tx_plsize)
82 #define ESPI_FLASH_READ_CYCLE_TYPE 0x00
83 #define ESPI_FLASH_WRITE_CYCLE_TYPE 0x01
84 #define ESPI_FLASH_ERASE_CYCLE_TYPE 0x02
85 #define ESPI_FLASH_SUCCESS_WITH_DATA_CYCLE_TYPE 0x0f
[all …]