| /cmsis-dsp-latest/Source/TransformFunctions/ |
| D | arm_rfft_fast_init_f16.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2023 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
46 @brief Initialization function for the 32pt floating-point real FFT.
47 @param[in,out] S points to an arm_rfft_fast_instance_f16 structure
49 - \ref ARM_MATH_SUCCESS : Operation successful
50 - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
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| D | arm_rfft_fast_init_f32.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
43 @brief Initialization function for the 32pt floating-point real FFT.
44 @param[in,out] S points to an arm_rfft_fast_instance_f32 structure
46 - \ref ARM_MATH_SUCCESS : Operation successful
47 - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
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| D | arm_rfft_fast_init_f64.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
43 @brief Initialization function for the 32pt double precision floating-point real FFT.
44 @param[in,out] S points to an arm_rfft_fast_instance_f64 structure
46 - \ref ARM_MATH_SUCCESS : Operation successful
47 - \ref ARM_MATH_ARGUMENT_ERROR : an error is detected
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| D | arm_cfft_radix2_init_f16.c | 1 /* ----------------------------------------------------------------------
4 * Description: Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
40 @brief Initialization function for the floating-point CFFT/CIFFT.
42 @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure
45 - value = 0: forward transform
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| D | arm_cfft_radix2_init_f32.c | 1 /* ----------------------------------------------------------------------
4 * Description: Radix-2 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
38 @brief Initialization function for the floating-point CFFT/CIFFT.
40 @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure
43 - value = 0: forward transform
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| D | arm_cfft_radix2_init_q31.c | 1 /* ----------------------------------------------------------------------
4 * Description: Radix-2 Decimation in Frequency Fixed-point CFFT & CIFFT Initialization function
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
40 @param[in,out] S points to an instance of the Q31 CFFT/CIFFT structure
43 - value = 0: forward transform
44 - value = 1: inverse transform
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| D | arm_cfft_radix2_init_q15.c | 1 /* ----------------------------------------------------------------------
4 * Description: Radix-2 Decimation in Frequency Q15 FFT & IFFT initialization function
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
41 @param[in,out] S points to an instance of the Q15 CFFT/CIFFT structure.
44 - value = 0: forward transform
45 - value = 1: inverse transform
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| D | arm_cfft_init_f32.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2023 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
58 static arm_status arm_cfft_radix4by2_rearrange_twiddles_##LEN##_f32(arm_cfft_instance_f32 *S)\
60 S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_##LEN##_f32; \
61 S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_##LEN##_f32; \
63 S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_##LEN##_f32; \
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| D | arm_cfft_init_q15.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
57 static arm_status arm_cfft_radix4by2_rearrange_twiddles_##LEN##_q15(arm_cfft_instance_q15 *S)\
59 S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_##LEN##_q15; \
60 S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_##LEN##_q15; \
62 S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_##LEN##_q15; \
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| D | arm_cfft_init_q31.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
58 static arm_status arm_cfft_radix4by2_rearrange_twiddles_##LEN##_q31(arm_cfft_instance_q31 *S)\
60 S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_##LEN##_q31; \
61 S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_##LEN##_q31; \
63 S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_##LEN##_q31; \
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| D | arm_cfft_init_f16.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2023 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
61 static arm_status arm_cfft_radix4by2_rearrange_twiddles_##LEN##_f16(arm_cfft_instance_f16 *S)\
63 S->rearranged_twiddle_tab_stride1_arr = rearranged_twiddle_tab_stride1_arr_##LEN##_f16; \
64 S->rearranged_twiddle_stride1 = rearranged_twiddle_stride1_##LEN##_f16; \
66 S->rearranged_twiddle_tab_stride2_arr = rearranged_twiddle_tab_stride2_arr_##LEN##_f16; \
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| D | arm_cfft_radix4_init_f16.c | 1 /* ----------------------------------------------------------------------
4 * Description: Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
40 @brief Initialization function for the floating-point CFFT/CIFFT.
42 @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure
45 - value = 0: forward transform
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| D | arm_cfft_radix4_init_f32.c | 1 /* ----------------------------------------------------------------------
4 * Description: Radix-4 Decimation in Frequency Floating-point CFFT & CIFFT Initialization function
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
39 @brief Initialization function for the floating-point CFFT/CIFFT.
41 @param[in,out] S points to an instance of the floating-point CFFT/CIFFT structure
44 - value = 0: forward transform
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| D | arm_mfcc_f32.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
51 @param[in] S points to the mfcc instance structure
69 const arm_mfcc_instance_f32 * S, in arm_mfcc_f32() argument
79 const float32_t *coefs=S->filterCoefs; in arm_mfcc_f32()
83 arm_absmax_f32(pSrc,S->fftLen,&maxValue,&index); in arm_mfcc_f32()
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| /cmsis-dsp-latest/Source/BayesFunctions/ |
| D | arm_gaussian_naive_bayes_predict_f32.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
44 * @param[in] *S points to a naive bayes instance structure
58 …BUTE uint32_t arm_gaussian_naive_bayes_predict_f32(const arm_gaussian_naive_bayes_instance_f32 *S, in arm_gaussian_naive_bayes_predict_f32() argument
65 const float32_t *pTheta = S->theta; in arm_gaussian_naive_bayes_predict_f32()
66 const float32_t *pSigma = S->sigma; in arm_gaussian_naive_bayes_predict_f32()
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| /cmsis-dsp-latest/Source/ControllerFunctions/ |
| D | arm_pid_init_q15.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
38 @param[in,out] S points to an instance of the Q15 PID structure
40 - value = 0: no change in state
41 - value = 1: reset state
51 arm_pid_instance_q15 * S, in arm_pid_init_q15() argument
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| D | arm_pid_init_q31.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
38 @param[in,out] S points to an instance of the Q31 PID structure
40 - value = 0: no change in state
41 - value = 1: reset state
51 arm_pid_instance_q31 * S, in arm_pid_init_q31() argument
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| /cmsis-dsp-latest/Source/SVMFunctions/ |
| D | arm_svm_polynomial_predict_f32.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
45 * @param[in] S Pointer to an instance of the polynomial SVM structure.
57 const arm_svm_polynomial_instance_f32 *S, in arm_svm_polynomial_predict_f32() argument
62 uint32_t numRows = S->nbOfSupportVectors; in arm_svm_polynomial_predict_f32()
63 uint32_t numCols = S->vectorDimension; in arm_svm_polynomial_predict_f32()
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| D | arm_svm_sigmoid_predict_f32.c | 1 /* ----------------------------------------------------------------------
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
42 * @param[in] S Pointer to an instance of the rbf SVM structure.
54 const arm_svm_sigmoid_instance_f32 *S, in arm_svm_sigmoid_predict_f32() argument
59 uint32_t numRows = S->nbOfSupportVectors; in arm_svm_sigmoid_predict_f32()
60 uint32_t numCols = S->vectorDimension; in arm_svm_sigmoid_predict_f32()
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| /cmsis-dsp-latest/Include/dsp/ |
| D | transform_functions.h | 6 * Target Processor: Cortex-M and Cortex-A cores
9 * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
11 * SPDX-License-Identifier: Apache-2.0
17 * www.apache.org/licenses/LICENSE-2.0
66 arm_cfft_radix2_instance_q15 * S,
73 const arm_cfft_radix2_instance_q15 * S,
93 arm_cfft_radix4_instance_q15 * S,
100 const arm_cfft_radix4_instance_q15 * S,
104 * @brief Instance structure for the Radix-2 Q31 CFFT/CIFFT function.
119 arm_cfft_radix2_instance_q31 * S,
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| D | debug.h | 6 * Target Processor: Cortex-M and Cortex-A cores
9 * Copyright (c) 2010-2020 Arm Limited or its affiliates. All rights reserved.
11 * SPDX-License-Identifier: Apache-2.0
17 * www.apache.org/licenses/LICENSE-2.0
47 #define PROW_f16(S,NB) \ argument
49 printf("{%f",(double)(S)[0]); \
52 printf(",%f",(double)(S)[i]);\
57 #define PV_f16(S,V,NB)\ argument
59 printf("%s=",(S)); \
64 #define PM_f16(S,M) \ argument
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| /cmsis-dsp-latest/Source/FilteringFunctions/ |
| D | arm_fir_interpolate_f32.c | 1 /* ----------------------------------------------------------------------
4 * Description: Floating-point FIR interpolation sequences
9 * Target Processor: Cortex-M and Cortex-A cores
10 * -------------------------------------------------------------------- */
12 * Copyright (C) 2010-2021 ARM Limited or its affiliates. All rights reserved.
14 * SPDX-License-Identifier: Apache-2.0
20 * www.apache.org/licenses/LICENSE-2.0
43 The upsampler inserts <code>L-1</code> zeros between each sample.
50 The library provides separate functions for Q15, Q31, and floating-point data types.
55 y[n] = b[0] * x[n] + b[L] * x[n-1] + ... + b[L*(phaseLength-1)] * x[n-phaseLength+1]
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| /cmsis-dsp-latest/Testing/Source/Tests/ |
| D | SupportTestsF32.cpp | 8 #define REL_ERROR (1.0e-5)
23 *outp=arm_weighted_average_f32(inp, coefsp,this->nbSamples); in test_weighted_average_f32()
26 ASSERT_REL_ERROR(*outp,refp[this->offset],REL_ERROR); in test_weighted_average_f32()
37 arm_copy_f32(inp, outp,this->nbSamples); in test_copy_f32()
52 arm_fill_f32(val, outp,this->nbSamples); in test_fill_f32()
55 for(i=0 ; i < this->nbSamples; i++) in test_fill_f32()
69 arm_float_to_q15(inp, outp,this->nbSamples); in test_float_to_q15()
83 arm_float_to_f64(inp, outp,this->nbSamples); in test_float_to_f64()
96 arm_float_to_q31(inp, outp,this->nbSamples); in test_float_to_q31()
110 arm_float_to_q7(inp, outp,this->nbSamples); in test_float_to_q7()
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| D | SupportTestsF64.cpp | 8 #define REL_ERROR (1.0e-5)
23 *outp=arm_weighted_average_f64(inp, coefsp,this->nbSamples);
26 ASSERT_REL_ERROR(*outp,refp[this->offset],REL_ERROR);
37 arm_copy_f64(inp, outp,this->nbSamples); in test_copy_f64()
52 arm_fill_f64(val, outp,this->nbSamples); in test_fill_f64()
55 for(i=0 ; i < this->nbSamples; i++) in test_fill_f64()
69 arm_f64_to_float(inp, outp,this->nbSamples); in test_f64_to_float()
83 arm_f64_to_q15(inp, outp,this->nbSamples); in test_f64_to_q15()
97 arm_f64_to_q31(inp, outp,this->nbSamples); in test_f64_to_q31()
111 arm_f64_to_q7(inp, outp,this->nbSamples); in test_f64_to_q7()
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| /cmsis-dsp-latest/dsppp/Include/dsppp/Helium/ |
| D | q7.hpp | 1 // -*- C++ -*-
197 template<int S,
198 typename std::enable_if<S==1,bool>::type = true>
206 15*S <= 255 => S <= 17
209 template<int S,
210 typename std::enable_if<(S>1) && (S<=17),bool>::type = true>
213 constexpr uint8x16_t offset={0*S,1*S,2*S,3*S,4*S,5*S,6*S,7*S, in vload1()
214 8*S,9*S,10*S,11*S,12*S,13*S,14*S,15*S}; in vload1()
216 //offset = vmulq_n_u8(offset,S); in vload1()
220 template<int S,
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