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/hal_intel-latest/zephyr/iut_test/test_zephyr/gpio/
Dtest_gpio.c4 * SPDX-License-Identifier: Apache-2.0
23 iut_print("GPLR register is 0x%x\n", read32(regs + 0x4)); in dump_gpio_regs()
24 iut_print("GPDR register is 0x%x\n", read32(regs + 0x1C)); in dump_gpio_regs()
25 iut_print("GRER register is 0x%x\n", read32(regs + 0x64)); in dump_gpio_regs()
26 iut_print("GFER register is 0x%x\n", read32(regs + 0x7c)); in dump_gpio_regs()
27 iut_print("GIMR register is 0x%x\n", read32(regs + 0xac)); in dump_gpio_regs()
28 iut_print("GISR register is 0x%x\n", read32(regs + 0xc4)); in dump_gpio_regs()
29 iut_print("\n"); in dump_gpio_regs()
43 iut_case_print("starting to test gpio pin %d output ...\n", i); in test_gpio_output()
69 iut_case_print("Pin %d Test done\n", i); in test_gpio_output()
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/hal_intel-latest/bsp_sedi/soc/intel_ish/pm/
Dish_pm.c4 * SPDX-License-Identifier: BSD-3-Clause
85 * ISH PMU does not support both-edge interrupt triggered gpio configuration.
92 * triggered by both-edge, and temporarily set each gpio pin to the single
94 * After exiting LPM, then restore the both-edge trigger configuration.
170 stat->total_time_us += t1 - t0; in log_pm_stat()
171 stat->count++; in log_pm_stat()
191 struct gdt_entry *__gdt = (struct gdt_entry *)(gdt_ptr->entries); in add_gdt_entry()
197 index = (gdt_ptr->limit + 1) >> 3; in add_gdt_entry()
204 gdt_ptr->limit += sizeof(struct gdt_entry); in add_gdt_entry()
206 return ((index + 1) << 3) - sizeof(struct gdt_entry); in add_gdt_entry()
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Dpm_regs.h4 * SPDX-License-Identifier: BSD-3-Clause
166 #define DMA_CH_EN_BIT(n) BIT(n) argument
167 #define DMA_CH_EN_WE_BIT(n) BIT(8 + (n)) argument
238 - CONFIG_AON_PERSISTENT_SIZE)
Dish_pm.h4 * SPDX-License-Identifier: BSD-3-Clause
39 * S0->Sx transition.
45 /* halt ISH minute-ia cpu core */
49 __asm__ volatile("sti;\n" in ish_mia_halt()
53 /* reset ISH mintue-ia cpu core */
70 * reset ISH (reset minute-ia cpu core, and power off main SRAM)
Dish_dma.c4 * SPDX-License-Identifier: BSD-3-Clause
13 int retval = -1; in dma_poll()
82 __asm__ volatile("\twbinvd\n"); /* Flush cache before dma start */ in ish_dma_copy()
134 length -= chunk; in ish_dma_copy()
147 /* Disable DMA on per-channel basis. */ in ish_dma_disable()
/hal_intel-latest/zephyr/iut_test/test_zephyr/i2c/
Dtest_i2c_log.c4 * SPDX-License-Identifier: Apache-2.0
54 return -ENODEV; in impl_test_log_i2c()
59 return -EINVAL; in impl_test_log_i2c()
63 for (int i = 0; i < sizeof(data) - 2; i++) { in impl_test_log_i2c()
66 data[sizeof(data) - 2] = '\n'; in impl_test_log_i2c()
67 data[sizeof(data) - 1] = '\r'; in impl_test_log_i2c()
82 if (ret == -EWOULDBLOCK) { in impl_test_log_i2c()
104 iut_print("\ttransfer %d-%d: error=%d\n", loop - 100, loop, error); in impl_test_log_i2c()
110 if ((get_sec() - sec_start) >= sec_run) { in impl_test_log_i2c()
129 iut_case_print("starting to run %d seconds ...\n", sec_run); in test_log_i2c_polling()
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/hal_intel-latest/zephyr/iut_test/src/
Dmain.c4 * SPDX-License-Identifier: Apache-2.0
33 iut_print("\nIUT: (%s, %s, 0x%x): Start running cases ......\n", in iut_run()
37 iut_print("\targc=%d\n", argc); in iut_run()
39 iut_print("\targv[%d]=\"%s\"\n", i, argv[i]); in iut_run()
54 if (group && strncmp(group, ut->group, strlen(group))) { in iut_run()
57 if (name && strncmp(ut->name, name, strlen(ut->name) + 1)) { in iut_run()
60 if (attri && ((ut->attri & attri) != attri)) { in iut_run()
64 iut_print("IUT: (%s, %s): Case %u, run\n", in iut_run()
65 ut->group, ut->name, iut_cnt_run); in iut_run()
68 ret = ut->func(argc, argv); in iut_run()
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Dtest_example.c4 * SPDX-License-Identifier: Apache-2.0
11 iut_case_print("argc=%d\n", argc); in test_example_1()
13 iut_case_print("argv=\"%s\"\n", argv[i]); in test_example_1()
23 iut_case_print("argc=%d\n", argc); in test_example_2()
25 iut_case_print("argv=\"%s\"\n", argv[i]); in test_example_2()
Dshell_iut.c4 * SPDX-License-Identifier: Apache-2.0
22 shell_fprintf(shell, SHELL_NORMAL, "IUT test cases:\n"); in cmd_iut_list()
24 shell_fprintf(shell, SHELL_NORMAL, "\t- %s, %s, 0x%x\n", in cmd_iut_list()
25 ut->group, ut->name, ut->attri); in cmd_iut_list()
36 return -EPERM; in cmd_iut_run()
45 return -EPERM; in cmd_iut_grun()
69 iut_print("get shell pointer error!!!\n"); in iut_shell_suspend()
74 sh_uart = (const struct shell_uart *)shell_ptr->iface->ctx; in iut_shell_suspend()
77 iut_print("get shell UART pointer error!!!\n"); in iut_shell_suspend()
82 k_timer_stop(sh_uart->timer); in iut_shell_suspend()
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/hal_intel-latest/zephyr/iut_test/test_sedi/
Dtest_sedi_rtc.c4 * SPDX-License-Identifier: Apache-2.0
23 iut_case_print("test loops = %d\n", test_loops); in test_rtc_inc()
30 iut_case_print("loop %d, cnt error, %llu->%llu\n", in test_rtc_inc()
35 iut_case_print("loop %d, us error, %llu->%llu\n", in test_rtc_inc()
45 iut_case_print("test exec time = %u us\n", (uint32_t)(us_rtc - us_start)); in test_rtc_inc()
/hal_intel-latest/zephyr/iut_test/test_zephyr/timer/
Dtest_sys_clock.c4 * SPDX-License-Identifier: Apache-2.0
35 iut_case_print("to run %u seconds\n", sec_run); in test_sys_clock_freq()
55 us_rtc = (us_rtc_end - us_rtc_start); in test_sys_clock_freq()
56 cyc_rtc = (cyc_rtc_end - cyc_rtc_start); in test_sys_clock_freq()
58 us_hpet = (us_hpet_end - us_hpet_start); in test_sys_clock_freq()
59 cyc_hpet = (cyc_hpet_end - cyc_hpet_start); in test_sys_clock_freq()
61 cyc_sys = (cyc_sys_end - cyc_sys_start); in test_sys_clock_freq()
70 iut_case_print("RTC : %llu cycles, %llu us, %u HZ\n", cyc_rtc, us_rtc, hz_rtc); in test_sys_clock_freq()
71 iut_case_print("HPET: %llu cycles, %llu us, %u HZ\n", cyc_hpet, us_hpet, hz_hpet); in test_sys_clock_freq()
72 iut_case_print("SYS CLOCK: %llu cycles, %llu us, %u HZ\n", cyc_sys, us_sys, hz_sys); in test_sys_clock_freq()
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/hal_intel-latest/bsp_sedi/soc/intel_ish/include/
Dsedi_driver_core.h4 * SPDX-License-Identifier: BSD-3-Clause
15 * \brief Clean & Invalidate D-Cache
16 * \details Cleans and Invalidates D-Cache
20 __asm__ volatile("wbinvd;\n\t"); in sedi_core_inv_clean_dcache()
22 __asm__ volatile("lock; addl $0,-4(%%esp);\n\t" ::: "memory", "cc"); in sedi_core_inv_clean_dcache()
26 * \brief D-Cache Clean and Invalidate by address
28 * \param[in] addr address (aligned to 32-byte boundary)
37 end = (end + (SEDI_DCACHE_LINE_SIZE - 1)) & ~(SEDI_DCACHE_LINE_SIZE - 1); in sedi_core_inv_clean_dcache_by_addr()
40 __asm__ volatile("clflush %0;\n\t" : "+m"(*(volatile char *)start)); in sedi_core_inv_clean_dcache_by_addr()
43 __asm__ volatile("lock; addl $0,-4(%%esp);\n\t" ::: "memory", "cc"); in sedi_core_inv_clean_dcache_by_addr()
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/hal_intel-latest/bsp_sedi/soc/common/include/
Dsedi_hpet_regs.h4 * SPDX-License-Identifier: BSD-3-Clause
10 * Generation Date: 2023-08-01
306 * T0C_LOW: Timer N Config And Capabilities
412 * T32M: Timer 32-Bit Mode
469 * T0C_HIGH: Timer N Config And Capabilities
490 * T0CV_LOW: Timer N Comparator Value
494 * ResetValue : (uint32_t)-1
496 SEDI_REG_DEFINE(HPET, T0CV_LOW, 0x108, RW, (uint32_t)0xffffffff, (uint32_t)-1);
511 * T0CV_HIGH: Timer N Comparator Value
515 * ResetValue : (uint32_t)-1
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Dsedi_reg_defs.h4 * SPDX-License-Identifier: BSD-3-Clause
28 * The constant for the register base address of instance <N> of a SEDI component IP
50 * const (RO) or un-const (RW or WO)
104 * const (RO) or un-const (RW or WO)
120 * - REGO (REGister address Offset): address offset from the IP base address.
121 * - REGR (REGister Reset value) : reset value after reset. It's const if the register is RO.
130 * - RBFO (Register Bit Field Offset): bit offset of the RBF.
131 * - RBFW (Register Bit Field Width) : bit width of the RBF.
132 * - RBFM (Register Bit Field Mask) : bit mask of the RBF.
139 ((SEDI_REGT(_comp, _reg))(-1) & \
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/hal_intel-latest/zephyr/iut_test/test_zephyr/dma/
Dtest_dma_m2m.c4 * SPDX-License-Identifier: Apache-2.0
32 iut_case_print("DMA ch[%d] transfer error, status = %d\n", channel, status); in test_done()
56 iut_case_print("Run with blen=%u\n", blen); in test_dma_m2m()
99 us = sedi_rtc_get_us() - us; in test_dma_m2m()
100 iut_case_print("Test Done after %u | %u us\n", (uint32_t)(us >> 32), (uint32_t)us); in test_dma_m2m()
/hal_intel-latest/bsp_sedi/include/driver/
Dsedi_driver_common.h2 * Copyright (c) 2023 - 2024 Intel Corporation
4 * SPDX-License-Identifier: BSD-3-Clause
98 #define SEDI_DRIVER_ERROR -1
104 #define SEDI_DRIVER_ERROR_BUSY -2
110 #define SEDI_DRIVER_ERROR_TIMEOUT -3
116 #define SEDI_DRIVER_ERROR_UNSUPPORTED -4
122 #define SEDI_DRIVER_ERROR_PARAMETER -5
128 #define SEDI_DRIVER_ERROR_TRANSFER -6
134 #define SEDI_DRIVER_ERROR_NO_DEV -7
140 #define SEDI_DRIVER_ERROR_SPECIFIC -8
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Dsedi_driver_hpet.h4 * SPDX-License-Identifier: BSD-3-Clause
77 * \param[in] min_delay: SoC-specific HPET minimal delay time.
84 * \param[in] min_delay: SoC-specific HPET minimal delay time to set.
149 * \brief Handle the interrupt of HPET Timer N
/hal_intel-latest/zephyr/iut_test/test_zephyr/x86/
Dtest_fatal.c4 * SPDX-License-Identifier: Apache-2.0
17 iut_case_print("no way to come here, %d\n", num); in test_divide0()
/hal_intel-latest/.github/workflows/
Dsedi_docs_update.yml7 permissions: read-all
11 runs-on: ubuntu-22.04
18 - name: Checkout Code
21 - name: Git Prepare
24 git config --global user.email "intel_hal@intel.github.com"
25 git config --global user.name "Intel HAL Docs Robot"
28 - name: Install Doxygen Tools
30 sudo apt-get update
31 sudo apt-get install -y graphviz doxygen
33 - name: Run Doxygen
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/hal_intel-latest/zephyr/iut_test/include/
Diut.h4 * SPDX-License-Identifier: Apache-2.0
48 iut_print("IUT: (%s, %s): "fmt, iut_running->group, iut_running->name, ## arg)
58 #define IUT_ERR_ASSERT (-1)
64 printk("%s:%d: ASSERT failed\n", __FILE__, __LINE__); \
/hal_intel-latest/bsp_sedi/soc/intel_ish/pm/aon/
Daon_task.c2 * Copyright (c) 2023 -2024 Intel Corporation
4 * SPDX-License-Identifier: BSD-3-Clause
63 static struct idt_entry aon_idt[AON_IDT_ENTRY_VEC_LAST -
68 .limit = (sizeof(struct idt_entry) * (AON_IDT_ENTRY_VEC_LAST + 1)) - 1,
69 .entries = (struct idt_entry *)((uint32_t)&aon_idt -
77 .esp0 = (uint8_t *)(CONFIG_AON_PERSISTENT_BASE - AON_SP_RESERVED),
96 .esp = CONFIG_AON_PERSISTENT_BASE - AON_SP_RESERVED,
97 .ebp = CONFIG_AON_PERSISTENT_BASE - AON_SP_RESERVED,
192 count--; in delay()
211 imr_fw_addr = (((uint64_t)snowball->uma_base_hi << 32) + in store_main_fw()
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/hal_intel-latest/docs/
Dbsp_sedi_doxyfile16 #---------------------------------------------------------------------------
18 #---------------------------------------------------------------------------
21 # file that follow. The default is UTF-8 which is also the encoding used for all
25 # The default value is: UTF-8.
27 DOXYFILE_ENCODING = UTF-8
30 # double-quotes, unless you are using Doxywizard) that should identify the
63 # If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub-
73 # If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII
74 # characters to appear in the names of generated files. If set to NO, non-ASCII
85 # Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States),
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